1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/phy/phy-tegra194-p2u.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: NVIDIA Tegra194 & Tegra234 P2U
8
9 maintainers:
10 - Thierry Reding <treding@nvidia.com>
11
12 description: >
13 Tegra194 has two PHY bricks namely HSIO (High Speed IO) and NVHS (NVIDIA High
14 Speed) each interfacing with 12 and 8 P2U instances respectively.
15 Tegra234 has three PHY bricks namely HSIO, NVHS and GBE (Gigabit Ethernet)
16 each interfacing with 8, 8 and 8 P2U instances respectively.
17 A P2U instance is a glue logic between Synopsys DesignWare Core PCIe IP's PIPE
18 interface and PHY of HSIO/NVHS/GBE bricks. Each P2U instance represents one
19 PCIe lane.
20
21 properties:
22 compatible:
23 enum:
24 - nvidia,tegra194-p2u
25 - nvidia,tegra234-p2u
26
27 reg:
28 maxItems: 1
29 description: Should be the physical address space and length of respective each P2U instance.
30
31 reg-names:
32 items:
33 - const: ctl
34
35 nvidia,skip-sz-protect-en:
36 description: Should be present if two PCIe retimers are present between
37 the root port and its immediate downstream device.
38 type: boolean
39
40 '#phy-cells':
41 const: 0
42
43 additionalProperties: false
44
45 examples:
46 - |
47 p2u_hsio_0: phy@3e10000 {
48 compatible = "nvidia,tegra194-p2u";
49 reg = <0x03e10000 0x10000>;
50 reg-names = "ctl";
51
52 #phy-cells = <0>;
53 };
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