1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/phy/renesas,usb2-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Renesas R-Car generation 3 USB 2.0 PHY
8
9 maintainers:
10 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
11
12 properties:
13 compatible:
14 oneOf:
15 - items:
16 - enum:
17 - renesas,usb2-phy-r8a77470 # RZ/G1C
18 - renesas,usb2-phy-r9a08g045 # RZ/G3S
19
20 - items:
21 - enum:
22 - renesas,usb2-phy-r7s9210 # RZ/A2
23 - renesas,usb2-phy-r8a774a1 # RZ/G2M
24 - renesas,usb2-phy-r8a774b1 # RZ/G2N
25 - renesas,usb2-phy-r8a774c0 # RZ/G2E
26 - renesas,usb2-phy-r8a774e1 # RZ/G2H
27 - renesas,usb2-phy-r8a7795 # R-Car H3
28 - renesas,usb2-phy-r8a7796 # R-Car M3-W
29 - renesas,usb2-phy-r8a77961 # R-Car M3-W+
30 - renesas,usb2-phy-r8a77965 # R-Car M3-N
31 - renesas,usb2-phy-r8a77990 # R-Car E3
32 - renesas,usb2-phy-r8a77995 # R-Car D3
33 - const: renesas,rcar-gen3-usb2-phy
34
35 - items:
36 - enum:
37 - renesas,usb2-phy-r9a07g043 # RZ/G2UL
38 - renesas,usb2-phy-r9a07g044 # RZ/G2{L,LC}
39 - renesas,usb2-phy-r9a07g054 # RZ/V2L
40 - const: renesas,rzg2l-usb2-phy
41
42 reg:
43 maxItems: 1
44
45 clocks:
46 minItems: 1
47 maxItems: 2
48
49 clock-names:
50 minItems: 1
51 items:
52 - const: fck
53 - const: usb_x1
54
55 '#phy-cells':
56 enum: [0, 1] # and 0 is deprecated.
57 description: |
58 The phandle's argument in the PHY specifier is the INT_STATUS bit of
59 controller.
60 - 1 = USBH_INTA (OHCI)
61 - 2 = USBH_INTB (EHCI)
62 - 3 = UCOM_INT (OTG and BC)
63
64 interrupts:
65 maxItems: 1
66
67 power-domains:
68 maxItems: 1
69
70 resets:
71 minItems: 1
72 items:
73 - description: reset of USB 2.0 host side
74 - description: reset of USB 2.0 peripheral side
75
76 vbus-supply:
77 description: |
78 Phandle to a regulator that provides power to the VBUS. This regulator
79 will be managed during the PHY power on/off sequence.
80
81 renesas,no-otg-pins:
82 $ref: /schemas/types.yaml#/definitions/flag
83 description: |
84 specify when a board does not provide proper otg pins.
85
86 dr_mode: true
87
88 if:
89 properties:
90 compatible:
91 contains:
92 const: renesas,usb2-phy-r7s9210
93 then:
94 required:
95 - clock-names
96
97 required:
98 - compatible
99 - reg
100 - clocks
101 - '#phy-cells'
102
103 allOf:
104 - if:
105 properties:
106 compatible:
107 contains:
108 const: renesas,rzg2l-usb2-phy
109 then:
110 required:
111 - resets
112
113 additionalProperties: false
114
115 examples:
116 - |
117 #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
118 #include <dt-bindings/interrupt-controller/arm-gic.h>
119 #include <dt-bindings/power/r8a7795-sysc.h>
120
121 usb-phy@ee080200 {
122 compatible = "renesas,usb2-phy-r8a7795", "renesas,rcar-gen3-usb2-phy";
123 reg = <0xee080200 0x700>;
124 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
125 clocks = <&cpg CPG_MOD 703>;
126 #phy-cells = <1>;
127 };
128
129 usb-phy@ee0a0200 {
130 compatible = "renesas,usb2-phy-r8a7795", "renesas,rcar-gen3-usb2-phy";
131 reg = <0xee0a0200 0x700>;
132 clocks = <&cpg CPG_MOD 702>;
133 #phy-cells = <1>;
134 };
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