1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/phy/socionext,uniphier-usb2-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Socionext UniPhier USB2 PHY
8
9 description: |
10 This describes the devicetree bindings for PHY interface built into
11 USB2 controller implemented on Socionext UniPhier SoCs.
12 Pro4 SoC has both USB2 and USB3 host controllers, however, this USB3
13 controller doesn't include its own High-Speed PHY. This needs to specify
14 USB2 PHY instead of USB3 HS-PHY.
15
16 maintainers:
17 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
18
19 properties:
20 compatible:
21 enum:
22 - socionext,uniphier-pro4-usb2-phy
23 - socionext,uniphier-ld11-usb2-phy
24
25 "#address-cells":
26 const: 1
27
28 "#size-cells":
29 const: 0
30
31 patternProperties:
32 "^phy@[0-9]+$":
33 type: object
34 additionalProperties: false
35
36 properties:
37 reg:
38 minimum: 0
39 maximum: 3
40 description:
41 The ID number for the PHY
42
43 "#phy-cells":
44 const: 0
45
46 vbus-supply:
47 description: A phandle to the regulator for USB VBUS, only for USB host
48
49 required:
50 - reg
51 - "#phy-cells"
52
53 required:
54 - compatible
55 - "#address-cells"
56 - "#size-cells"
57
58 additionalProperties: false
59
60 examples:
61 - |
62 // The UniPhier usb2-phy should be a subnode of a "syscon" compatible node.
63
64 usb-hub {
65 compatible = "socionext,uniphier-ld11-usb2-phy";
66 #address-cells = <1>;
67 #size-cells = <0>;
68
69 usb_phy0: phy@0 {
70 reg = <0>;
71 #phy-cells = <0>;
72 };
73
74 usb_phy1: phy@1 {
75 reg = <1>;
76 #phy-cells = <0>;
77 };
78
79 usb_phy2: phy@2 {
80 reg = <2>;
81 #phy-cells = <0>;
82 };
83 };
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