1 * Freescale MXS Pin Controller
2
3 The pins controlled by mxs pin controller are organized in banks, each bank
4 has 32 pins. Each pin has 4 multiplexing functions, and generally, the 4th
5 function is GPIO. The configuration on the pins includes drive strength,
6 voltage and pull-up.
7
8 Required properties:
9 - compatible: "fsl,imx23-pinctrl" or "fsl,imx28-pinctrl"
10 - reg: Should contain the register physical address and length for the
11 pin controller.
12
13 Please refer to pinctrl-bindings.txt in this directory for details of the
14 common pinctrl bindings used by client devices.
15
16 The node of mxs pin controller acts as a container for an arbitrary number of
17 subnodes. Each of these subnodes represents some desired configuration for
18 a group of pins, and only affects those parameters that are explicitly listed.
19 In other words, a subnode that describes a drive strength parameter implies no
20 information about pull-up. For this reason, even seemingly boolean values are
21 actually tristates in this binding: unspecified, off, or on. Unspecified is
22 represented as an absent property, and off/on are represented as integer
23 values 0 and 1.
24
25 Those subnodes under mxs pin controller node will fall into two categories.
26 One is to set up a group of pins for a function, both mux selection and pin
27 configurations, and it's called group node in the binding document. The other
28 one is to adjust the pin configuration for some particular pins that need a
29 different configuration than what is defined in group node. The binding
30 document calls this type of node config node.
31
32 On mxs, there is no hardware pin group. The pin group in this binding only
33 means a group of pins put together for particular peripheral to work in
34 particular function, like SSP0 functioning as mmc0-8bit. That said, the
35 group node should include all the pins needed for one function rather than
36 having these pins defined in several group nodes. It also means each of
37 "pinctrl-*" phandle in client device node should only have one group node
38 pointed in there, while the phandle can have multiple config node referenced
39 there to adjust configurations for some pins in the group.
40
41 Required subnode-properties:
42 - fsl,pinmux-ids: An integer array. Each integer in the array specify a pin
43 with given mux function, with bank, pin and mux packed as below.
44
45 [15..12] : bank number
46 [11..4] : pin number
47 [3..0] : mux selection
48
49 This integer with mux selection packed is used as an entity by both group
50 and config nodes to identify a pin. The mux selection in the integer takes
51 effects only on group node, and will get ignored by driver with config node,
52 since config node is only meant to set up pin configurations.
53
54 Valid values for these integers are listed below.
55
56 - reg: Should be the index of the group nodes for same function. This property
57 is required only for group nodes, and should not be present in any config
58 nodes.
59
60 Optional subnode-properties:
61 - fsl,drive-strength: Integer.
62 0: MXS_DRIVE_4mA
63 1: MXS_DRIVE_8mA
64 2: MXS_DRIVE_12mA
65 3: MXS_DRIVE_16mA
66 - fsl,voltage: Integer.
67 0: MXS_VOLTAGE_LOW - 1.8 V
68 1: MXS_VOLTAGE_HIGH - 3.3 V
69 - fsl,pull-up: Integer.
70 0: MXS_PULL_DISABLE - Disable the internal pull-up
71 1: MXS_PULL_ENABLE - Enable the internal pull-up
72
73 Note that when enabling the pull-up, the internal pad keeper gets disabled.
74 Also, some pins doesn't have a pull up, in that case, setting the fsl,pull-up
75 will only disable the internal pad keeper.
76
77 Examples:
78
79 pinctrl@80018000 {
80 #address-cells = <1>;
81 #size-cells = <0>;
82 compatible = "fsl,imx28-pinctrl";
83 reg = <0x80018000 2000>;
84
85 mmc0_8bit_pins_a: mmc0-8bit@0 {
86 reg = <0>;
87 fsl,pinmux-ids = <
88 MX28_PAD_SSP0_DATA0__SSP0_D0
89 MX28_PAD_SSP0_DATA1__SSP0_D1
90 MX28_PAD_SSP0_DATA2__SSP0_D2
91 MX28_PAD_SSP0_DATA3__SSP0_D3
92 MX28_PAD_SSP0_DATA4__SSP0_D4
93 MX28_PAD_SSP0_DATA5__SSP0_D5
94 MX28_PAD_SSP0_DATA6__SSP0_D6
95 MX28_PAD_SSP0_DATA7__SSP0_D7
96 MX28_PAD_SSP0_CMD__SSP0_CMD
97 MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT
98 MX28_PAD_SSP0_SCK__SSP0_SCK
99 >;
100 fsl,drive-strength = <MXS_DRIVE_4mA>;
101 fsl,voltage = <MXS_VOLTAGE_HIGH>;
102 fsl,pull-up = <MXS_PULL_ENABLE>;
103 };
104
105 mmc_cd_cfg: mmc-cd-cfg {
106 fsl,pinmux-ids = <MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT>;
107 fsl,pull-up = <MXS_PULL_DISABLE>;
108 };
109
110 mmc_sck_cfg: mmc-sck-cfg {
111 fsl,pinmux-ids = <MX28_PAD_SSP0_SCK__SSP0_SCK>;
112 fsl,drive-strength = <MXS_DRIVE_12mA>;
113 fsl,pull-up = <MXS_PULL_DISABLE>;
114 };
115 };
116
117 In this example, group node mmc0-8bit defines a group of pins for mxs SSP0
118 to function as a 8-bit mmc device, with 8mA, 3.3V and pull-up configurations
119 applied on all these pins. And config nodes mmc-cd-cfg and mmc-sck-cfg are
120 adjusting the configuration for pins card-detection and clock from what group
121 node mmc0-8bit defines. Only the configuration properties to be adjusted need
122 to be listed in the config nodes.
123
124 Valid values for i.MX28/i.MX23 pinmux-id are defined in
125 arch/arm/boot/dts/imx28-pinfunc.h and arch/arm/boot/dts/imx23-pinfunc.h.
126 The definitions for the padconfig properties can be found in
127 arch/arm/boot/dts/mxs-pinfunc.h.
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