1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra234-pinmux-aon.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: NVIDIA Tegra234 AON Pinmux Controller
8
9 maintainers:
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12
13 properties:
14 compatible:
15 const: nvidia,tegra234-pinmux-aon
16
17 reg:
18 maxItems: 1
19
20 patternProperties:
21 "^pinmux(-[a-z0-9-]+)?$":
22 type: object
23
24 # pin groups
25 additionalProperties:
26 $ref: nvidia,tegra234-pinmux-common.yaml
27
28 properties:
29 nvidia,pins:
30 items:
31 enum: [ can0_dout_paa0, can0_din_paa1, can1_dout_paa2,
32 can1_din_paa3, can0_stb_paa4, can0_en_paa5,
33 soc_gpio49_paa6, can0_err_paa7, can1_stb_pbb0,
34 can1_en_pbb1, soc_gpio50_pbb2, can1_err_pbb3,
35 spi2_sck_pcc0, spi2_miso_pcc1, spi2_mosi_pcc2,
36 spi2_cs0_pcc3, touch_clk_pcc4, uart3_tx_pcc5,
37 uart3_rx_pcc6, gen2_i2c_scl_pcc7, gen2_i2c_sda_pdd0,
38 gen8_i2c_scl_pdd1, gen8_i2c_sda_pdd2,
39 sce_error_pee0, vcomp_alert_pee1,
40 ao_retention_n_pee2, batt_oc_pee3, power_on_pee4,
41 soc_gpio26_pee5, soc_gpio27_pee6, bootv_ctl_n_pee7,
42 hdmi_cec_pgg0,
43 # drive groups
44 drive_touch_clk_pcc4, drive_uart3_rx_pcc6,
45 drive_uart3_tx_pcc5, drive_gen8_i2c_sda_pdd2,
46 drive_gen8_i2c_scl_pdd1, drive_spi2_mosi_pcc2,
47 drive_gen2_i2c_scl_pcc7, drive_spi2_cs0_pcc3,
48 drive_gen2_i2c_sda_pdd0, drive_spi2_sck_pcc0,
49 drive_spi2_miso_pcc1, drive_can1_dout_paa2,
50 drive_can1_din_paa3, drive_can0_dout_paa0,
51 drive_can0_din_paa1, drive_can0_stb_paa4,
52 drive_can0_en_paa5, drive_soc_gpio49_paa6,
53 drive_can0_err_paa7, drive_can1_stb_pbb0,
54 drive_can1_en_pbb1, drive_soc_gpio50_pbb2,
55 drive_can1_err_pbb3, drive_sce_error_pee0,
56 drive_batt_oc_pee3, drive_bootv_ctl_n_pee7,
57 drive_power_on_pee4, drive_soc_gpio26_pee5,
58 drive_soc_gpio27_pee6, drive_ao_retention_n_pee2,
59 drive_vcomp_alert_pee1, drive_hdmi_cec_pgg0 ]
60
61 unevaluatedProperties: false
62
63 examples:
64 - |
65 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
66
67 pinmux@c300000 {
68 compatible = "nvidia,tegra234-pinmux-aon";
69 reg = <0xc300000 0x4000>;
70
71 pinctrl-names = "cec";
72 pinctrl-0 = <&cec_state>;
73
74 cec_state: pinmux-cec {
75 cec {
76 nvidia,pins = "hdmi_cec_pgg0";
77 nvidia,function = "gp";
78 };
79 };
80 };
81 ...
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