1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,msm8916-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Qualcomm MSM8916 TLMM pin controller
8
9 maintainers:
10 - Bjorn Andersson <andersson@kernel.org>
11 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
12
13 description:
14 Top Level Mode Multiplexer pin controller in Qualcomm MSM8916 SoC.
15
16 properties:
17 compatible:
18 const: qcom,msm8916-pinctrl
19
20 reg:
21 maxItems: 1
22
23 interrupts:
24 maxItems: 1
25
26 gpio-reserved-ranges:
27 minItems: 1
28 maxItems: 61
29
30 gpio-line-names:
31 maxItems: 122
32
33 patternProperties:
34 "-state$":
35 oneOf:
36 - $ref: "#/$defs/qcom-msm8916-tlmm-state"
37 - patternProperties:
38 "-pins$":
39 $ref: "#/$defs/qcom-msm8916-tlmm-state"
40 additionalProperties: false
41
42 $defs:
43 qcom-msm8916-tlmm-state:
44 type: object
45 description:
46 Pinctrl node's client devices use subnodes for desired pin configuration.
47 Client device subnodes use below standard properties.
48 $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
49 unevaluatedProperties: false
50
51 properties:
52 pins:
53 description:
54 List of gpio pins affected by the properties specified in this
55 subnode.
56 items:
57 oneOf:
58 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-1][0-9]|12[01])$"
59 - enum: [ qdsd_clk, qdsd_cmd, qdsd_data0, qdsd_data1, qdsd_data2,
60 qdsd_data3, sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk,
61 sdc2_cmd, sdc2_data ]
62 minItems: 1
63 maxItems: 36
64
65 function:
66 description:
67 Specify the alternative function to be configured for the specified
68 pins.
69
70 enum: [ gpio, adsp_ext, alsp_int, atest_bbrx0, atest_bbrx1, atest_char,
71 atest_char0, atest_char1, atest_char2, atest_char3,
72 atest_combodac, atest_gpsadc0, atest_gpsadc1, atest_tsens,
73 atest_wlan0, atest_wlan1, backlight_en, bimc_dte0, bimc_dte1,
74 blsp_i2c1, blsp_i2c2, blsp_i2c3, blsp_i2c4, blsp_i2c5,
75 blsp_i2c6, blsp_spi1, blsp_spi1_cs1, blsp_spi1_cs2,
76 blsp_spi1_cs3, blsp_spi2, blsp_spi2_cs1, blsp_spi2_cs2,
77 blsp_spi2_cs3, blsp_spi3, blsp_spi3_cs1, blsp_spi3_cs2,
78 blsp_spi3_cs3, blsp_spi4, blsp_spi5, blsp_spi6, blsp_uart1,
79 blsp_uart2, blsp_uim1, blsp_uim2, cam1_rst, cam1_standby,
80 cam_mclk0, cam_mclk1, cci_async, cci_i2c, cci_timer0,
81 cci_timer1, cci_timer2, cdc_pdm0, codec_mad, dbg_out,
82 display_5v, dmic0_clk, dmic0_data, dsi_rst, ebi0_wrcdc,
83 euro_us, ext_lpass, flash_strobe, gcc_gp1_clk_a, gcc_gp1_clk_b,
84 gcc_gp2_clk_a, gcc_gp2_clk_b, gcc_gp3_clk_a, gcc_gp3_clk_b,
85 gsm0_tx0, gsm0_tx1, gsm1_tx0, gsm1_tx1, gyro_accl, kpsns0,
86 kpsns1, kpsns2, ldo_en, ldo_update, mag_int, mdp_vsync,
87 modem_tsync, m_voc, nav_pps, nav_tsync, pa_indicator, pbs0,
88 pbs1, pbs2, pri_mi2s, pri_mi2s_ws, prng_rosc,
89 pwr_crypto_enabled_a, pwr_crypto_enabled_b,
90 pwr_modem_enabled_a, pwr_modem_enabled_b, pwr_nav_enabled_a,
91 pwr_nav_enabled_b, qdss_ctitrig_in_a0, qdss_ctitrig_in_a1,
92 qdss_ctitrig_in_b0, qdss_ctitrig_in_b1, qdss_ctitrig_out_a0,
93 qdss_ctitrig_out_a1, qdss_ctitrig_out_b0, qdss_ctitrig_out_b1,
94 qdss_traceclk_a, qdss_traceclk_b, qdss_tracectl_a,
95 qdss_tracectl_b, qdss_tracedata_a, qdss_tracedata_b, reset_n,
96 sd_card, sd_write, sec_mi2s, smb_int, ssbi_wtr0, ssbi_wtr1,
97 uim1, uim2, uim3, uim_batt, wcss_bt, wcss_fm, wcss_wlan,
98 webcam1_rst ]
99
100 required:
101 - pins
102
103 allOf:
104 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
105
106 required:
107 - compatible
108 - reg
109
110 unevaluatedProperties: false
111
112 examples:
113 - |
114 #include <dt-bindings/interrupt-controller/arm-gic.h>
115
116 msmgpio: pinctrl@1000000 {
117 compatible = "qcom,msm8916-pinctrl";
118 reg = <0x01000000 0x300000>;
119 interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
120 gpio-controller;
121 gpio-ranges = <&msmgpio 0 0 122>;
122 #gpio-cells = <2>;
123 interrupt-controller;
124 #interrupt-cells = <2>;
125
126 blsp1-uart2-sleep-state {
127 pins = "gpio4", "gpio5";
128 function = "gpio";
129
130 drive-strength = <2>;
131 bias-pull-down;
132 };
133
134 spi1-default-state {
135 spi-pins {
136 pins = "gpio0", "gpio1", "gpio3";
137 function = "blsp_spi1";
138
139 drive-strength = <12>;
140 bias-disable;
141 };
142
143 cs-pins {
144 pins = "gpio2";
145 function = "gpio";
146
147 drive-strength = <16>;
148 bias-disable;
149 output-high;
150 };
151 };
152 };
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