1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,msm8960-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Qualcomm MSM8960 TLMM pin controller
8
9 maintainers:
10 - Bjorn Andersson <andersson@kernel.org>
11 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
12
13 description:
14 Top Level Mode Multiplexer pin controller in Qualcomm MSM8960 SoC.
15
16 properties:
17 compatible:
18 const: qcom,msm8960-pinctrl
19
20 reg:
21 maxItems: 1
22
23 interrupts:
24 maxItems: 1
25
26 gpio-reserved-ranges:
27 minItems: 1
28 maxItems: 76
29
30 gpio-line-names:
31 maxItems: 152
32
33 patternProperties:
34 "-state$":
35 oneOf:
36 - $ref: "#/$defs/qcom-msm8960-tlmm-state"
37 - patternProperties:
38 "-pins$":
39 $ref: "#/$defs/qcom-msm8960-tlmm-state"
40 additionalProperties: false
41
42 $defs:
43 qcom-msm8960-tlmm-state:
44 type: object
45 description:
46 Pinctrl node's client devices use subnodes for desired pin configuration.
47 Client device subnodes use below standard properties.
48 $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
49 unevaluatedProperties: false
50
51 properties:
52 pins:
53 description:
54 List of gpio pins affected by the properties specified in this
55 subnode.
56 items:
57 oneOf:
58 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9]|15[0-1])$"
59 - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc3_clk, sdc3_cmd,
60 sdc3_data ]
61 minItems: 1
62 maxItems: 36
63
64 function:
65 description:
66 Specify the alternative function to be configured for the specified
67 pins.
68
69 enum: [ gpio, audio_pcm, bt, cam_mclk0, cam_mclk1, cam_mclk2,
70 codec_mic_i2s, codec_spkr_i2s, ext_gps, fm, gps_blanking,
71 gps_pps_in, gps_pps_out, gp_clk_0a, gp_clk_0b, gp_clk_1a,
72 gp_clk_1b, gp_clk_2a, gp_clk_2b, gp_mn, gp_pdm_0a, gp_pdm_0b,
73 gp_pdm_1a, gp_pdm_1b, gp_pdm_2a, gp_pdm_2b, gsbi1,
74 gsbi1_spi_cs1_n, gsbi1_spi_cs2a_n, gsbi1_spi_cs2b_n,
75 gsbi1_spi_cs3_n, gsbi2, gsbi2_spi_cs1_n, gsbi2_spi_cs2_n,
76 gsbi2_spi_cs3_n, gsbi3, gsbi4, gsbi4_3d_cam_i2c_l,
77 gsbi4_3d_cam_i2c_r, gsbi5, gsbi5_3d_cam_i2c_l,
78 gsbi5_3d_cam_i2c_r, gsbi6, gsbi7, gsbi8, gsbi9, gsbi10, gsbi11,
79 gsbi11_spi_cs1a_n, gsbi11_spi_cs1b_n, gsbi11_spi_cs2a_n,
80 gsbi11_spi_cs2b_n, gsbi11_spi_cs3_n, gsbi12, hdmi_cec,
81 hdmi_ddc_clock, hdmi_ddc_data, hdmi_hot_plug_detect, hsic,
82 mdp_vsync, mi2s, mic_i2s, pmb_clk, pmb_ext_ctrl, ps_hold,
83 rpm_wdog, sdc2, sdc4, sdc5, slimbus1, slimbus2, spkr_i2s,
84 ssbi1, ssbi2, ssbi_ext_gps, ssbi_pmic2, ssbi_qpa1, ssbi_ts,
85 tsif1, tsif2, ts_eoc, usb_fs1, usb_fs1_oe, usb_fs1_oe_n,
86 usb_fs2, usb_fs2_oe, usb_fs2_oe_n, vfe_camif_timer1_a,
87 vfe_camif_timer1_b, vfe_camif_timer2, vfe_camif_timer3_a,
88 vfe_camif_timer3_b, vfe_camif_timer4_a, vfe_camif_timer4_b,
89 vfe_camif_timer4_c, vfe_camif_timer5_a, vfe_camif_timer5_b,
90 vfe_camif_timer6_a, vfe_camif_timer6_b, vfe_camif_timer6_c,
91 vfe_camif_timer7_a, vfe_camif_timer7_b, vfe_camif_timer7_c,
92 wlan ]
93
94 required:
95 - pins
96
97 allOf:
98 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
99
100 required:
101 - compatible
102 - reg
103
104 unevaluatedProperties: false
105
106 examples:
107 - |
108 #include <dt-bindings/interrupt-controller/arm-gic.h>
109
110 msmgpio: pinctrl@800000 {
111 compatible = "qcom,msm8960-pinctrl";
112 reg = <0x800000 0x4000>;
113 #gpio-cells = <2>;
114 gpio-controller;
115 gpio-ranges = <&msmgpio 0 0 152>;
116 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
117 interrupt-controller;
118 #interrupt-cells = <2>;
119
120 spi1-default-state {
121 mosi-pins {
122 pins = "gpio6";
123 function = "gsbi1";
124 drive-strength = <12>;
125 bias-disable;
126 };
127
128 miso-pins {
129 pins = "gpio7";
130 function = "gsbi1";
131 drive-strength = <12>;
132 bias-disable;
133 };
134
135 cs-pins {
136 pins = "gpio8";
137 function = "gpio";
138 drive-strength = <12>;
139 bias-disable;
140 output-low;
141 };
142
143 clk-pins {
144 pins = "gpio9";
145 function = "gsbi1";
146 drive-strength = <12>;
147 bias-disable;
148 };
149 };
150 };
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