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Linux/Documentation/devicetree/bindings/pinctrl/starfive,jh7110-aon-pinctrl.yaml

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  1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
  2 %YAML 1.2
  3 ---
  4 $id: http://devicetree.org/schemas/pinctrl/starfive,jh7110-aon-pinctrl.yaml#
  5 $schema: http://devicetree.org/meta-schemas/core.yaml#
  6 
  7 title: StarFive JH7110 AON Pin Controller
  8 
  9 description: |
 10   Bindings for the JH7110 RISC-V SoC from StarFive Technology Ltd.
 11 
 12   Out of the SoC's many pins only the ones named PAD_RGPIO0 to PAD_RGPIO3
 13   can be multiplexed and have configurable bias, drive strength,
 14   schmitt trigger etc.
 15   Some peripherals such as PWM have their I/O go through the 4 "GPIOs".
 16 
 17 maintainers:
 18   - Jianlong Huang <jianlong.huang@starfivetech.com>
 19 
 20 properties:
 21   compatible:
 22     const: starfive,jh7110-aon-pinctrl
 23 
 24   reg:
 25     maxItems: 1
 26 
 27   resets:
 28     maxItems: 1
 29 
 30   interrupts:
 31     maxItems: 1
 32 
 33   interrupt-controller: true
 34 
 35   '#interrupt-cells':
 36     const: 2
 37 
 38   gpio-controller: true
 39 
 40   '#gpio-cells':
 41     const: 2
 42 
 43 patternProperties:
 44   '-[0-9]+$':
 45     type: object
 46     additionalProperties: false
 47     patternProperties:
 48       '-pins$':
 49         type: object
 50         description: |
 51           A pinctrl node should contain at least one subnode representing the
 52           pinctrl groups available on the machine. Each subnode will list the
 53           pins it needs, and how they should be configured, with regard to
 54           muxer configuration, bias, input enable/disable, input schmitt
 55           trigger enable/disable, slew-rate and drive strength.
 56         allOf:
 57           - $ref: /schemas/pinctrl/pincfg-node.yaml
 58           - $ref: /schemas/pinctrl/pinmux-node.yaml
 59         additionalProperties: false
 60 
 61         properties:
 62           pinmux:
 63             description: |
 64               The list of GPIOs and their mux settings that properties in the
 65               node apply to. This should be set using the GPIOMUX macro.
 66 
 67           bias-disable: true
 68 
 69           bias-pull-up:
 70             type: boolean
 71 
 72           bias-pull-down:
 73             type: boolean
 74 
 75           drive-strength:
 76             enum: [ 2, 4, 8, 12 ]
 77 
 78           input-enable: true
 79 
 80           input-disable: true
 81 
 82           input-schmitt-enable: true
 83 
 84           input-schmitt-disable: true
 85 
 86           slew-rate:
 87             maximum: 1
 88 
 89 required:
 90   - compatible
 91   - reg
 92   - interrupts
 93   - interrupt-controller
 94   - '#interrupt-cells'
 95   - gpio-controller
 96   - '#gpio-cells'
 97 
 98 additionalProperties: false
 99 
100 examples:
101   - |
102     pinctrl@17020000 {
103         compatible = "starfive,jh7110-aon-pinctrl";
104         reg = <0x17020000 0x10000>;
105         resets = <&aoncrg 2>;
106         interrupts = <85>;
107         interrupt-controller;
108         #interrupt-cells = <2>;
109         gpio-controller;
110         #gpio-cells = <2>;
111 
112         pwm-0 {
113             pwm-pins {
114                 pinmux = <0xff030802>;
115                 bias-disable;
116                 drive-strength = <12>;
117                 input-disable;
118                 input-schmitt-disable;
119                 slew-rate = <0>;
120             };
121         };
122     };
123 
124 ...

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