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Linux/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml

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  1 # SPDX-License-Identifier: GPL-2.0
  2 %YAML 1.2
  3 ---
  4 $id: http://devicetree.org/schemas/power/rockchip,power-controller.yaml#
  5 $schema: http://devicetree.org/meta-schemas/core.yaml#
  6 
  7 title: Rockchip Power Domains
  8 
  9 maintainers:
 10   - Elaine Zhang <zhangqing@rock-chips.com>
 11   - Heiko Stuebner <heiko@sntech.de>
 12 
 13 description: |
 14   Rockchip processors include support for multiple power domains
 15   which can be powered up/down by software based on different
 16   application scenarios to save power.
 17 
 18   Power domains contained within power-controller node are
 19   generic power domain providers documented in
 20   Documentation/devicetree/bindings/power/power-domain.yaml.
 21 
 22   IP cores belonging to a power domain should contain a
 23   "power-domains" property that is a phandle for the
 24   power domain node representing the domain.
 25 
 26 properties:
 27   $nodename:
 28     const: power-controller
 29 
 30   compatible:
 31     enum:
 32       - rockchip,px30-power-controller
 33       - rockchip,rk3036-power-controller
 34       - rockchip,rk3066-power-controller
 35       - rockchip,rk3128-power-controller
 36       - rockchip,rk3188-power-controller
 37       - rockchip,rk3228-power-controller
 38       - rockchip,rk3288-power-controller
 39       - rockchip,rk3328-power-controller
 40       - rockchip,rk3366-power-controller
 41       - rockchip,rk3368-power-controller
 42       - rockchip,rk3399-power-controller
 43       - rockchip,rk3568-power-controller
 44       - rockchip,rk3576-power-controller
 45       - rockchip,rk3588-power-controller
 46       - rockchip,rv1126-power-controller
 47 
 48   "#power-domain-cells":
 49     const: 1
 50 
 51   "#address-cells":
 52     const: 1
 53 
 54   "#size-cells":
 55     const: 0
 56 
 57 required:
 58   - compatible
 59   - "#power-domain-cells"
 60 
 61 additionalProperties: false
 62 
 63 patternProperties:
 64   "^power-domain@[0-9a-f]+$":
 65 
 66     $ref: "#/$defs/pd-node"
 67 
 68     unevaluatedProperties: false
 69 
 70     properties:
 71       "#address-cells":
 72         const: 1
 73 
 74       "#size-cells":
 75         const: 0
 76 
 77     patternProperties:
 78       "^power-domain@[0-9a-f]+$":
 79 
 80         $ref: "#/$defs/pd-node"
 81 
 82         unevaluatedProperties: false
 83 
 84         properties:
 85           "#address-cells":
 86             const: 1
 87 
 88           "#size-cells":
 89             const: 0
 90 
 91         patternProperties:
 92           "^power-domain@[0-9a-f]+$":
 93 
 94             $ref: "#/$defs/pd-node"
 95 
 96             unevaluatedProperties: false
 97 
 98             properties:
 99               "#power-domain-cells":
100                 const: 0
101 
102 $defs:
103   pd-node:
104     type: object
105     description: |
106       Represents the power domains within the power controller node.
107 
108     properties:
109       reg:
110         maxItems: 1
111         description: |
112           Power domain index. Valid values are defined in
113           "include/dt-bindings/power/px30-power.h"
114           "include/dt-bindings/power/rk3036-power.h"
115           "include/dt-bindings/power/rk3066-power.h"
116           "include/dt-bindings/power/rk3128-power.h"
117           "include/dt-bindings/power/rk3188-power.h"
118           "include/dt-bindings/power/rk3228-power.h"
119           "include/dt-bindings/power/rk3288-power.h"
120           "include/dt-bindings/power/rk3328-power.h"
121           "include/dt-bindings/power/rk3366-power.h"
122           "include/dt-bindings/power/rk3368-power.h"
123           "include/dt-bindings/power/rk3399-power.h"
124           "include/dt-bindings/power/rk3568-power.h"
125           "include/dt-bindings/power/rk3588-power.h"
126           "include/dt-bindings/power/rockchip,rv1126-power.h"
127 
128       clocks:
129         minItems: 1
130         maxItems: 30
131         description: |
132           A number of phandles to clocks that need to be enabled
133           while power domain switches state.
134 
135       pm_qos:
136         $ref: /schemas/types.yaml#/definitions/phandle-array
137         items:
138           maxItems: 1
139         description: |
140           A number of phandles to qos blocks which need to be saved and restored
141           while power domain switches state.
142 
143       "#power-domain-cells":
144         enum: [0, 1]
145         description:
146           Must be 0 for nodes representing a single PM domain and 1 for nodes
147           providing multiple PM domains.
148 
149     required:
150       - reg
151       - "#power-domain-cells"
152 
153 examples:
154   - |
155     #include <dt-bindings/clock/rk3399-cru.h>
156     #include <dt-bindings/power/rk3399-power.h>
157 
158     soc {
159         #address-cells = <2>;
160         #size-cells = <2>;
161 
162         qos_hdcp: qos@ffa90000 {
163             compatible = "rockchip,rk3399-qos", "syscon";
164             reg = <0x0 0xffa90000 0x0 0x20>;
165         };
166 
167         qos_iep: qos@ffa98000 {
168             compatible = "rockchip,rk3399-qos", "syscon";
169             reg = <0x0 0xffa98000 0x0 0x20>;
170         };
171 
172         qos_rga_r: qos@ffab0000 {
173             compatible = "rockchip,rk3399-qos", "syscon";
174             reg = <0x0 0xffab0000 0x0 0x20>;
175         };
176 
177         qos_rga_w: qos@ffab0080 {
178             compatible = "rockchip,rk3399-qos", "syscon";
179             reg = <0x0 0xffab0080 0x0 0x20>;
180         };
181 
182         qos_video_m0: qos@ffab8000 {
183             compatible = "rockchip,rk3399-qos", "syscon";
184             reg = <0x0 0xffab8000 0x0 0x20>;
185         };
186 
187         qos_video_m1_r: qos@ffac0000 {
188             compatible = "rockchip,rk3399-qos", "syscon";
189             reg = <0x0 0xffac0000 0x0 0x20>;
190         };
191 
192         qos_video_m1_w: qos@ffac0080 {
193             compatible = "rockchip,rk3399-qos", "syscon";
194             reg = <0x0 0xffac0080 0x0 0x20>;
195         };
196 
197         power-management@ff310000 {
198             compatible = "rockchip,rk3399-pmu", "syscon", "simple-mfd";
199             reg = <0x0 0xff310000 0x0 0x1000>;
200 
201             power-controller {
202                 compatible = "rockchip,rk3399-power-controller";
203                 #power-domain-cells = <1>;
204                 #address-cells = <1>;
205                 #size-cells = <0>;
206 
207                 /* These power domains are grouped by VD_CENTER */
208                 power-domain@RK3399_PD_IEP {
209                     reg = <RK3399_PD_IEP>;
210                     clocks = <&cru ACLK_IEP>,
211                              <&cru HCLK_IEP>;
212                     pm_qos = <&qos_iep>;
213                     #power-domain-cells = <0>;
214                 };
215                 power-domain@RK3399_PD_RGA {
216                     reg = <RK3399_PD_RGA>;
217                     clocks = <&cru ACLK_RGA>,
218                              <&cru HCLK_RGA>;
219                     pm_qos = <&qos_rga_r>,
220                              <&qos_rga_w>;
221                     #power-domain-cells = <0>;
222                 };
223                 power-domain@RK3399_PD_VCODEC {
224                     reg = <RK3399_PD_VCODEC>;
225                     clocks = <&cru ACLK_VCODEC>,
226                              <&cru HCLK_VCODEC>;
227                     pm_qos = <&qos_video_m0>;
228                     #power-domain-cells = <0>;
229                 };
230                 power-domain@RK3399_PD_VDU {
231                     reg = <RK3399_PD_VDU>;
232                     clocks = <&cru ACLK_VDU>,
233                              <&cru HCLK_VDU>;
234                     pm_qos = <&qos_video_m1_r>,
235                              <&qos_video_m1_w>;
236                     #power-domain-cells = <0>;
237                 };
238                 power-domain@RK3399_PD_VIO {
239                     reg = <RK3399_PD_VIO>;
240                     #power-domain-cells = <1>;
241                     #address-cells = <1>;
242                     #size-cells = <0>;
243 
244                     power-domain@RK3399_PD_HDCP {
245                         reg = <RK3399_PD_HDCP>;
246                         clocks = <&cru ACLK_HDCP>,
247                                  <&cru HCLK_HDCP>,
248                                  <&cru PCLK_HDCP>;
249                         pm_qos = <&qos_hdcp>;
250                         #power-domain-cells = <0>;
251                     };
252                 };
253             };
254         };
255     };

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