1 * Freescale DMA Controllers
2
3 ** Freescale Elo DMA Controller
4 This is a little-endian 4-channel DMA controller, used in Freescale mpc83xx
5 series chips such as mpc8315, mpc8349, mpc8379 etc.
6
7 Required properties:
8
9 - compatible : must include "fsl,elo-dma"
10 - reg : DMA General Status Register, i.e. DGSR which contains
11 status for all the 4 DMA channels
12 - ranges : describes the mapping between the address space of the
13 DMA channels and the address space of the DMA controller
14 - cell-index : controller index. 0 for controller @ 0x8100
15 - interrupts : interrupt specifier for DMA IRQ
16
17 - DMA channel nodes:
18 - compatible : must include "fsl,elo-dma-channel"
19 However, see note below.
20 - reg : DMA channel specific registers
21 - cell-index : DMA channel index starts at 0.
22
23 Optional properties:
24 - interrupts : interrupt specifier for DMA channel IRQ
25 (on 83xx this is expected to be identical to
26 the interrupts property of the parent node)
27
28 Example:
29 dma@82a8 {
30 #address-cells = <1>;
31 #size-cells = <1>;
32 compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
33 reg = <0x82a8 4>;
34 ranges = <0 0x8100 0x1a4>;
35 interrupt-parent = <&ipic>;
36 interrupts = <71 8>;
37 cell-index = <0>;
38 dma-channel@0 {
39 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
40 cell-index = <0>;
41 reg = <0 0x80>;
42 interrupt-parent = <&ipic>;
43 interrupts = <71 8>;
44 };
45 dma-channel@80 {
46 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
47 cell-index = <1>;
48 reg = <0x80 0x80>;
49 interrupt-parent = <&ipic>;
50 interrupts = <71 8>;
51 };
52 dma-channel@100 {
53 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
54 cell-index = <2>;
55 reg = <0x100 0x80>;
56 interrupt-parent = <&ipic>;
57 interrupts = <71 8>;
58 };
59 dma-channel@180 {
60 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
61 cell-index = <3>;
62 reg = <0x180 0x80>;
63 interrupt-parent = <&ipic>;
64 interrupts = <71 8>;
65 };
66 };
67
68 ** Freescale EloPlus DMA Controller
69 This is a 4-channel DMA controller with extended addresses and chaining,
70 mainly used in Freescale mpc85xx/86xx, Pxxx and BSC series chips, such as
71 mpc8540, mpc8641 p4080, bsc9131 etc.
72
73 Required properties:
74
75 - compatible : must include "fsl,eloplus-dma"
76 - reg : DMA General Status Register, i.e. DGSR which contains
77 status for all the 4 DMA channels
78 - cell-index : controller index. 0 for controller @ 0x21000,
79 1 for controller @ 0xc000
80 - ranges : describes the mapping between the address space of the
81 DMA channels and the address space of the DMA controller
82
83 - DMA channel nodes:
84 - compatible : must include "fsl,eloplus-dma-channel"
85 However, see note below.
86 - cell-index : DMA channel index starts at 0.
87 - reg : DMA channel specific registers
88 - interrupts : interrupt specifier for DMA channel IRQ
89
90 Example:
91 dma@21300 {
92 #address-cells = <1>;
93 #size-cells = <1>;
94 compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma";
95 reg = <0x21300 4>;
96 ranges = <0 0x21100 0x200>;
97 cell-index = <0>;
98 dma-channel@0 {
99 compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
100 reg = <0 0x80>;
101 cell-index = <0>;
102 interrupt-parent = <&mpic>;
103 interrupts = <20 2>;
104 };
105 dma-channel@80 {
106 compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
107 reg = <0x80 0x80>;
108 cell-index = <1>;
109 interrupt-parent = <&mpic>;
110 interrupts = <21 2>;
111 };
112 dma-channel@100 {
113 compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
114 reg = <0x100 0x80>;
115 cell-index = <2>;
116 interrupt-parent = <&mpic>;
117 interrupts = <22 2>;
118 };
119 dma-channel@180 {
120 compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
121 reg = <0x180 0x80>;
122 cell-index = <3>;
123 interrupt-parent = <&mpic>;
124 interrupts = <23 2>;
125 };
126 };
127
128 ** Freescale Elo3 DMA Controller
129 DMA controller which has same function as EloPlus except that Elo3 has 8
130 channels while EloPlus has only 4, it is used in Freescale Txxx and Bxxx
131 series chips, such as t1040, t4240, b4860.
132
133 Required properties:
134
135 - compatible : must include "fsl,elo3-dma"
136 - reg : contains two entries for DMA General Status Registers,
137 i.e. DGSR0 which includes status for channel 1~4, and
138 DGSR1 for channel 5~8
139 - ranges : describes the mapping between the address space of the
140 DMA channels and the address space of the DMA controller
141
142 - DMA channel nodes:
143 - compatible : must include "fsl,eloplus-dma-channel"
144 - reg : DMA channel specific registers
145 - interrupts : interrupt specifier for DMA channel IRQ
146
147 Example:
148 dma@100300 {
149 #address-cells = <1>;
150 #size-cells = <1>;
151 compatible = "fsl,elo3-dma";
152 reg = <0x100300 0x4>,
153 <0x100600 0x4>;
154 ranges = <0x0 0x100100 0x500>;
155 dma-channel@0 {
156 compatible = "fsl,eloplus-dma-channel";
157 reg = <0x0 0x80>;
158 interrupts = <28 2 0 0>;
159 };
160 dma-channel@80 {
161 compatible = "fsl,eloplus-dma-channel";
162 reg = <0x80 0x80>;
163 interrupts = <29 2 0 0>;
164 };
165 dma-channel@100 {
166 compatible = "fsl,eloplus-dma-channel";
167 reg = <0x100 0x80>;
168 interrupts = <30 2 0 0>;
169 };
170 dma-channel@180 {
171 compatible = "fsl,eloplus-dma-channel";
172 reg = <0x180 0x80>;
173 interrupts = <31 2 0 0>;
174 };
175 dma-channel@300 {
176 compatible = "fsl,eloplus-dma-channel";
177 reg = <0x300 0x80>;
178 interrupts = <76 2 0 0>;
179 };
180 dma-channel@380 {
181 compatible = "fsl,eloplus-dma-channel";
182 reg = <0x380 0x80>;
183 interrupts = <77 2 0 0>;
184 };
185 dma-channel@400 {
186 compatible = "fsl,eloplus-dma-channel";
187 reg = <0x400 0x80>;
188 interrupts = <78 2 0 0>;
189 };
190 dma-channel@480 {
191 compatible = "fsl,eloplus-dma-channel";
192 reg = <0x480 0x80>;
193 interrupts = <79 2 0 0>;
194 };
195 };
196
197 Note on DMA channel compatible properties: The compatible property must say
198 "fsl,elo-dma-channel" or "fsl,eloplus-dma-channel" to be used by the Elo DMA
199 driver (fsldma). Any DMA channel used by fsldma cannot be used by another
200 DMA driver, such as the SSI sound drivers for the MPC8610. Therefore, any DMA
201 channel that should be used for another driver should not use
202 "fsl,elo-dma-channel" or "fsl,eloplus-dma-channel". For the SSI drivers, for
203 example, the compatible property should be "fsl,ssi-dma-channel". See ssi.txt
204 for more information.
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