1 # SPDX-License-Identifier: GPL-2.0
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/pwm/pwm-samsung.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Samsung SoC PWM timers
8
9 maintainers:
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Krzysztof Kozlowski <krzk@kernel.org>
12
13 description: |+
14 Samsung SoCs contain PWM timer blocks which can be used for system clock source
15 and clock event timers, as well as to drive SoC outputs with PWM signal. Each
16 PWM timer block provides 5 PWM channels (not all of them can drive physical
17 outputs - see SoC and board manual).
18
19 Be aware that the clocksource driver supports only uniprocessor systems.
20
21 properties:
22 compatible:
23 oneOf:
24 - enum:
25 - samsung,s3c2410-pwm # 16-bit, S3C24xx
26 - samsung,s3c6400-pwm # 32-bit, S3C64xx
27 - samsung,s5p6440-pwm # 32-bit, S5P64x0
28 - samsung,s5pc100-pwm # 32-bit, S5PC100, S5PV210, Exynos4210 rev0 SoCs
29 - samsung,exynos4210-pwm # 32-bit, Exynos
30 - items:
31 - enum:
32 - samsung,exynos5433-pwm
33 - samsung,exynos7-pwm
34 - samsung,exynosautov9-pwm
35 - samsung,exynosautov920-pwm
36 - tesla,fsd-pwm
37 - const: samsung,exynos4210-pwm
38
39 reg:
40 maxItems: 1
41
42 clocks:
43 minItems: 1
44 maxItems: 3
45
46 clock-names:
47 description: |
48 Should contain all following required clock names:
49 - "timers" - PWM base clock used to generate PWM signals,
50 and any subset of following optional clock names:
51 - "pwm-tclk0" - first external PWM clock source,
52 - "pwm-tclk1" - second external PWM clock source.
53 Note that not all IP variants allow using all external clock sources.
54 Refer to SoC documentation to learn which clock source configurations
55 are available.
56 oneOf:
57 - items:
58 - const: timers
59 - items:
60 - const: timers
61 - const: pwm-tclk0
62 - items:
63 - const: timers
64 - const: pwm-tclk1
65 - items:
66 - const: timers
67 - const: pwm-tclk0
68 - const: pwm-tclk1
69
70 interrupts:
71 description:
72 One interrupt per timer, starting at timer 0. Necessary only for SoCs which
73 use PWM clocksource.
74 minItems: 1
75 maxItems: 5
76
77 "#pwm-cells":
78 description:
79 The only third cell flag supported by this binding
80 is PWM_POLARITY_INVERTED.
81 const: 3
82
83 samsung,pwm-outputs:
84 description:
85 A list of PWM channels used as PWM outputs on particular platform.
86 It is an array of up to 5 elements being indices of PWM channels
87 (from 0 to 4), the order does not matter.
88 $ref: /schemas/types.yaml#/definitions/uint32-array
89 uniqueItems: true
90 items:
91 minimum: 0
92 maximum: 4
93
94 required:
95 - clocks
96 - clock-names
97 - compatible
98 - reg
99
100 additionalProperties: false
101
102 allOf:
103 - $ref: pwm.yaml#
104
105 - if:
106 properties:
107 compatible:
108 contains:
109 enum:
110 - samsung,s3c2410-pwm
111 - samsung,s3c6400-pwm
112 - samsung,s5p6440-pwm
113 - samsung,s5pc100-pwm
114 then:
115 required:
116 - interrupts
117
118 examples:
119 - |
120 pwm@7f006000 {
121 compatible = "samsung,s3c6400-pwm";
122 reg = <0x7f006000 0x1000>;
123 interrupt-parent = <&vic0>;
124 interrupts = <23>, <24>, <25>, <27>, <28>;
125 clocks = <&clock 67>;
126 clock-names = "timers";
127 samsung,pwm-outputs = <0>, <1>;
128 #pwm-cells = <3>;
129 };
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