1 # SPDX-License-Identifier: GPL-2.0
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/pwm/renesas,pwm-rcar.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Renesas R-Car PWM Timer Controller
8
9 maintainers:
10 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
11
12 properties:
13 compatible:
14 items:
15 - enum:
16 - renesas,pwm-r8a7742 # RZ/G1H
17 - renesas,pwm-r8a7743 # RZ/G1M
18 - renesas,pwm-r8a7744 # RZ/G1N
19 - renesas,pwm-r8a7745 # RZ/G1E
20 - renesas,pwm-r8a77470 # RZ/G1C
21 - renesas,pwm-r8a774a1 # RZ/G2M
22 - renesas,pwm-r8a774b1 # RZ/G2N
23 - renesas,pwm-r8a774c0 # RZ/G2E
24 - renesas,pwm-r8a774e1 # RZ/G2H
25 - renesas,pwm-r8a7778 # R-Car M1A
26 - renesas,pwm-r8a7779 # R-Car H1
27 - renesas,pwm-r8a7790 # R-Car H2
28 - renesas,pwm-r8a7791 # R-Car M2-W
29 - renesas,pwm-r8a7794 # R-Car E2
30 - renesas,pwm-r8a7795 # R-Car H3
31 - renesas,pwm-r8a7796 # R-Car M3-W
32 - renesas,pwm-r8a77961 # R-Car M3-W+
33 - renesas,pwm-r8a77965 # R-Car M3-N
34 - renesas,pwm-r8a77970 # R-Car V3M
35 - renesas,pwm-r8a77980 # R-Car V3H
36 - renesas,pwm-r8a77990 # R-Car E3
37 - renesas,pwm-r8a77995 # R-Car D3
38 - renesas,pwm-r8a779a0 # R-Car V3U
39 - renesas,pwm-r8a779g0 # R-Car V4H
40 - renesas,pwm-r8a779h0 # R-Car V4M
41 - const: renesas,pwm-rcar
42
43 reg:
44 # base address and length of the registers block for the PWM.
45 maxItems: 1
46
47 '#pwm-cells':
48 # should be 2. See pwm.yaml in this directory for a description of
49 # the cells format.
50 const: 2
51
52 clocks:
53 # clock phandle and specifier pair.
54 maxItems: 1
55
56 power-domains:
57 maxItems: 1
58
59 resets:
60 maxItems: 1
61
62 required:
63 - compatible
64 - reg
65 - clocks
66 - power-domains
67
68 allOf:
69 - $ref: pwm.yaml#
70
71 - if:
72 not:
73 properties:
74 compatible:
75 contains:
76 enum:
77 - renesas,pwm-r8a7778
78 - renesas,pwm-r8a7779
79 then:
80 required:
81 - resets
82
83 additionalProperties: false
84
85 examples:
86 - |
87 #include <dt-bindings/clock/r8a7743-cpg-mssr.h>
88 #include <dt-bindings/power/r8a7743-sysc.h>
89
90 pwm0: pwm@e6e30000 {
91 compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
92 reg = <0xe6e30000 0x8>;
93 clocks = <&cpg CPG_MOD 523>;
94 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
95 resets = <&cpg 523>;
96 #pwm-cells = <2>;
97 pinctrl-0 = <&pwm0_pins>;
98 pinctrl-names = "default";
99 };
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