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Linux/Documentation/devicetree/bindings/pwm/snps,dw-apb-timers-pwm2.yaml

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  1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2 # Copyright (C) 2022 SiFive, Inc.
  3 %YAML 1.2
  4 ---
  5 $id: http://devicetree.org/schemas/pwm/snps,dw-apb-timers-pwm2.yaml#
  6 $schema: http://devicetree.org/meta-schemas/core.yaml#
  7 
  8 title: Synopsys DW-APB timers PWM controller
  9 
 10 maintainers:
 11   - Ben Dooks <ben.dooks@sifive.com>
 12 
 13 description:
 14   This describes the DesignWare APB timers module when used in the PWM
 15   mode. The IP core can be generated with various options which can
 16   control the functionality, the number of PWMs available and other
 17   internal controls the designer requires.
 18 
 19   The IP block has a version register so this can be used for detection
 20   instead of having to encode the IP version number in the device tree
 21   compatible.
 22 
 23 allOf:
 24   - $ref: pwm.yaml#
 25 
 26 properties:
 27   compatible:
 28     const: snps,dw-apb-timers-pwm2
 29 
 30   reg:
 31     maxItems: 1
 32 
 33   "#pwm-cells":
 34     const: 3
 35 
 36   clocks:
 37     items:
 38       - description: Interface bus clock
 39       - description: PWM reference clock
 40 
 41   clock-names:
 42     items:
 43       - const: bus
 44       - const: timer
 45 
 46   snps,pwm-number:
 47     $ref: /schemas/types.yaml#/definitions/uint32
 48     description: The number of PWM channels configured for this instance
 49     enum: [1, 2, 3, 4, 5, 6, 7, 8]
 50 
 51 required:
 52   - compatible
 53   - reg
 54   - clocks
 55   - clock-names
 56 
 57 additionalProperties: false
 58 
 59 examples:
 60   - |
 61     pwm: pwm@180000 {
 62       compatible = "snps,dw-apb-timers-pwm2";
 63       reg = <0x180000 0x200>;
 64       #pwm-cells = <3>;
 65       clocks = <&bus>, <&timer>;
 66       clock-names = "bus", "timer";
 67     };

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