1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries
3 %YAML 1.2
4 ---
5 $id: http://devicetree.org/schemas/serial/atmel,at91-usart.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
7
8 title: Atmel Universal Synchronous Asynchronous Receiver/Transmitter (USART)
9
10 maintainers:
11 - Richard Genoud <richard.genoud@bootlin.com>
12
13 properties:
14 compatible:
15 oneOf:
16 - enum:
17 - atmel,at91rm9200-usart
18 - atmel,at91sam9260-usart
19 - items:
20 - const: atmel,at91rm9200-dbgu
21 - const: atmel,at91rm9200-usart
22 - items:
23 - const: atmel,at91sam9260-dbgu
24 - const: atmel,at91sam9260-usart
25 - items:
26 - enum:
27 - microchip,sam9x60-usart
28 - microchip,sam9x7-usart
29 - const: atmel,at91sam9260-usart
30 - items:
31 - const: microchip,sam9x60-dbgu
32 - const: microchip,sam9x60-usart
33 - const: atmel,at91sam9260-dbgu
34 - const: atmel,at91sam9260-usart
35 - items:
36 - const: microchip,sam9x7-dbgu
37 - const: atmel,at91sam9260-dbgu
38 - const: microchip,sam9x7-usart
39 - const: atmel,at91sam9260-usart
40
41 reg:
42 maxItems: 1
43
44 interrupts:
45 maxItems: 1
46
47 clock-names:
48 minItems: 1
49 items:
50 - const: usart
51 - const: gclk
52
53 clocks:
54 minItems: 1
55 items:
56 - description: USART Peripheral Clock
57 - description: USART Generic Clock
58
59 dmas:
60 items:
61 - description: TX DMA Channel
62 - description: RX DMA Channel
63
64 dma-names:
65 items:
66 - const: tx
67 - const: rx
68
69 atmel,usart-mode:
70 $ref: /schemas/types.yaml#/definitions/uint32
71 description:
72 Must be either <AT91_USART_MODE_SPI> for SPI or
73 <AT91_USART_MODE_SERIAL> for USART (found in dt-bindings/mfd/at91-usart.h).
74 enum: [ 0, 1 ]
75
76 atmel,use-dma-rx:
77 type: boolean
78 description: use of PDC or DMA for receiving data
79
80 atmel,use-dma-tx:
81 type: boolean
82 description: use of PDC or DMA for transmitting data
83
84 atmel,fifo-size:
85 $ref: /schemas/types.yaml#/definitions/uint32
86 description:
87 Maximum number of data the RX and TX FIFOs can store for FIFO
88 capable USARTS.
89 enum: [ 16, 32 ]
90
91 required:
92 - compatible
93 - reg
94 - interrupts
95 - clock-names
96 - clocks
97 - atmel,usart-mode
98
99 allOf:
100 - if:
101 properties:
102 atmel,usart-mode:
103 const: 1
104 then:
105 allOf:
106 - $ref: /schemas/spi/spi-controller.yaml#
107
108 properties:
109 atmel,use-dma-rx: false
110
111 atmel,use-dma-tx: false
112
113 atmel,fifo-size: false
114
115 "#size-cells":
116 const: 0
117
118 "#address-cells":
119 const: 1
120
121 required:
122 - "#size-cells"
123 - "#address-cells"
124
125 else:
126 allOf:
127 - $ref: /schemas/serial/serial.yaml#
128 - $ref: /schemas/serial/rs485.yaml#
129
130 unevaluatedProperties: false
131
132 examples:
133 - |
134 #include <dt-bindings/gpio/gpio.h>
135 #include <dt-bindings/interrupt-controller/irq.h>
136 #include <dt-bindings/mfd/at91-usart.h>
137 #include <dt-bindings/dma/at91.h>
138
139 /* use PDC */
140 usart0: serial@fff8c000 {
141 compatible = "atmel,at91sam9260-usart";
142 reg = <0xfff8c000 0x4000>;
143 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
144 interrupts = <7>;
145 clocks = <&usart0_clk>;
146 clock-names = "usart";
147 atmel,use-dma-rx;
148 atmel,use-dma-tx;
149 rts-gpios = <&pioD 15 GPIO_ACTIVE_LOW>;
150 cts-gpios = <&pioD 16 GPIO_ACTIVE_LOW>;
151 dtr-gpios = <&pioD 17 GPIO_ACTIVE_LOW>;
152 dsr-gpios = <&pioD 18 GPIO_ACTIVE_LOW>;
153 dcd-gpios = <&pioD 20 GPIO_ACTIVE_LOW>;
154 rng-gpios = <&pioD 19 GPIO_ACTIVE_LOW>;
155 };
156
157 - |
158 #include <dt-bindings/gpio/gpio.h>
159 #include <dt-bindings/interrupt-controller/irq.h>
160 #include <dt-bindings/mfd/at91-usart.h>
161 #include <dt-bindings/dma/at91.h>
162
163 /* use DMA */
164 usart1: serial@f001c000 {
165 compatible = "atmel,at91sam9260-usart";
166 reg = <0xf001c000 0x100>;
167 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
168 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>;
169 clocks = <&usart0_clk>;
170 clock-names = "usart";
171 atmel,use-dma-rx;
172 atmel,use-dma-tx;
173 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(3)>,
174 <&dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
175 dma-names = "tx", "rx";
176 atmel,fifo-size = <32>;
177 };
178
179 - |
180 #include <dt-bindings/gpio/gpio.h>
181 #include <dt-bindings/interrupt-controller/irq.h>
182 #include <dt-bindings/mfd/at91-usart.h>
183 #include <dt-bindings/dma/at91.h>
184
185 /* SPI mode */
186 spi0: spi@f001c000 {
187 compatible = "atmel,at91sam9260-usart";
188 reg = <0xf001c000 0x100>;
189 #address-cells = <1>;
190 #size-cells = <0>;
191 atmel,usart-mode = <AT91_USART_MODE_SPI>;
192 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>;
193 clocks = <&usart0_clk>;
194 clock-names = "usart";
195 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(3)>,
196 <&dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
197 dma-names = "tx", "rx";
198 cs-gpios = <&pioB 3 GPIO_ACTIVE_HIGH>;
199 };
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