1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/soc/fsl/cpm_qe/fsl,qe.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Freescale QUICC Engine module (QE)
8
9 maintainers:
10 - Frank Li <Frank.Li@nxp.com>
11
12 description: |
13 This represents qe module that is installed on PowerQUICC II Pro.
14
15 NOTE: This is an interim binding; it should be updated to fit
16 in with the CPM binding later in this document.
17
18 Basically, it is a bus of devices, that could act more or less
19 as a complete entity (UCC, USB etc ). All of them should be siblings on
20 the "root" qe node, using the common properties from there.
21 The description below applies to the qe of MPC8360 and
22 more nodes and properties would be extended in the future.
23
24 properties:
25 compatible:
26 items:
27 - const: fsl,qe
28 - const: simple-bus
29
30 reg:
31 maxItems: 1
32
33 ranges:
34 maxItems: 1
35
36 model:
37 $ref: /schemas/types.yaml#/definitions/string
38 enum: [QE, CPM, CPM2]
39
40 bus-frequency:
41 $ref: /schemas/types.yaml#/definitions/uint32
42 description: the clock frequency for QUICC Engine.
43
44 fsl,qe-num-riscs:
45 $ref: /schemas/types.yaml#/definitions/uint32
46 description: define how many RISC engines the QE has.
47
48 fsl,qe-snums:
49 $ref: /schemas/types.yaml#/definitions/uint8-array
50 maxItems: 28
51 description:
52 defining the array of serial number (SNUM) values for the virtual
53 threads.
54
55 fsl,firmware-phandle:
56 $ref: /schemas/types.yaml#/definitions/phandle
57 description: |
58 required only if there is no fsl,qe-firmware child node
59
60 Points to a firmware node (see "QE Firmware Node" below)
61 that contains the firmware that should be uploaded for this QE.
62 The compatible property for the firmware node should say,
63 "fsl,qe-firmware".
64
65 brg-frequency:
66 $ref: /schemas/types.yaml#/definitions/uint32
67 description:
68 the internal clock source frequency for baud-rate
69 generators in Hz.
70
71 fsl,qe-num-snums:
72 $ref: /schemas/types.yaml#/definitions/uint32
73 deprecated: true
74 description: |
75 define how many serial number(SNUM) the QE can use
76 for the threads. Use fsl,qe-snums instead to not only specify the
77 number of snums, but also their values.
78
79 patternProperties:
80 '^muram@[a-f0-9]+$':
81 $ref: fsl,qe-muram.yaml
82
83 '^interrupt-controller@[a-f0-9]+$':
84 $ref: fsl,qe-ic.yaml
85
86 '^si@[a-f0-9]+$':
87 $ref: fsl,qe-si.yaml
88
89 '^siram@[a-f0-9]+$':
90 $ref: fsl,qe-siram.yaml
91
92 required:
93 - compatible
94 - reg
95 - bus-frequency
96
97 allOf:
98 - $ref: /schemas/simple-bus.yaml#
99
100 unevaluatedProperties: false
101
102 examples:
103 - |
104 qe-bus@e0100000 {
105 compatible = "fsl,qe", "simple-bus";
106 reg = <0xe0100000 0x480>;
107 ranges = <0 0xe0100000 0x00100000>;
108 #address-cells = <1>;
109 #size-cells = <1>;
110 brg-frequency = <0>;
111 bus-frequency = <0x179a7b00>;
112 fsl,qe-snums = /bits/ 8 <
113 0x04 0x05 0x0c 0x0d 0x14 0x15 0x1c 0x1d
114 0x24 0x25 0x2c 0x2d 0x34 0x35 0x88 0x89
115 0x98 0x99 0xa8 0xa9 0xb8 0xb9 0xc8 0xc9
116 0xd8 0xd9 0xe8 0xe9>;
117
118 interrupt-controller@80 {
119 compatible = "fsl,qe-ic";
120 reg = <0x80 0x80>;
121 #interrupt-cells = <1>;
122 interrupt-controller;
123 interrupts = <95 2 0 0 94 2 0 0>;
124 };
125
126 si@700 {
127 compatible = "fsl,t1040-qe-si";
128 reg = <0x700 0x80>;
129 };
130
131 siram@1000 {
132 compatible = "fsl,t1040-qe-siram";
133 reg = <0x1000 0x800>;
134 };
135
136 muram@10000 {
137 compatible = "fsl,qe-muram", "fsl,cpm-muram";
138 ranges = <0 0x00010000 0x0000c000>;
139 #address-cells = <1>;
140 #size-cells = <1>;
141
142 data-only@0{
143 compatible = "fsl,qe-muram-data",
144 "fsl,cpm-muram-data";
145 reg = <0 0xc000>;
146 };
147 };
148 };
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