1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/soc/microchip/atmel,at91rm9200-tcb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Atmel Timer Counter Block
8
9 maintainers:
10 - Alexandre Belloni <alexandre.belloni@bootlin.com>
11
12 description: |
13 The Atmel (now Microchip) SoCs have timers named Timer Counter Block. Each
14 timer has three channels with two counters each.
15
16 properties:
17 compatible:
18 items:
19 - enum:
20 - atmel,at91rm9200-tcb
21 - atmel,at91sam9x5-tcb
22 - atmel,sama5d2-tcb
23 - const: simple-mfd
24 - const: syscon
25
26 reg:
27 maxItems: 1
28
29 interrupts:
30 description:
31 List of interrupts. One interrupt per TCB channel if available or one
32 interrupt for the TC block
33 minItems: 1
34 maxItems: 3
35
36 clock-names:
37 description:
38 List of clock names. Always includes t0_clk and slow clk. Also includes
39 t1_clk and t2_clk if a clock per channel is available.
40 minItems: 2
41 maxItems: 4
42
43 clocks:
44 minItems: 2
45 maxItems: 4
46
47 '#address-cells':
48 const: 1
49
50 '#size-cells':
51 const: 0
52
53 patternProperties:
54 "^timer@[0-2]$":
55 description: The timer block channels that are used as timers or counters.
56 type: object
57 additionalProperties: false
58 properties:
59 compatible:
60 items:
61 - enum:
62 - atmel,tcb-timer
63 - atmel,tcb-pwm
64 - microchip,tcb-capture
65 reg:
66 description:
67 List of channels to use for this particular timer. In Microchip TCB capture
68 mode channels are registered as a counter devices, for the qdec mode TCB0's
69 channel <0> and <1> are required.
70
71 minItems: 1
72 maxItems: 3
73 required:
74 - compatible
75 - reg
76
77 "^pwm@[0-2]$":
78 description: The timer block channels that are used as PWMs.
79 $ref: /schemas/pwm/pwm.yaml#
80 type: object
81 properties:
82 compatible:
83 const: atmel,tcb-pwm
84 reg:
85 description:
86 TCB channel to use for this PWM.
87 enum: [ 0, 1, 2 ]
88
89 "#pwm-cells":
90 description:
91 The only third cell flag supported by this binding is
92 PWM_POLARITY_INVERTED.
93 const: 3
94
95 required:
96 - compatible
97 - reg
98 - "#pwm-cells"
99
100 additionalProperties: false
101
102
103 allOf:
104 - if:
105 properties:
106 compatible:
107 contains:
108 const: atmel,sama5d2-tcb
109 then:
110 properties:
111 clocks:
112 minItems: 3
113 maxItems: 3
114 clock-names:
115 items:
116 - const: t0_clk
117 - const: gclk
118 - const: slow_clk
119 else:
120 properties:
121 clocks:
122 minItems: 2
123 maxItems: 4
124 clock-names:
125 oneOf:
126 - items:
127 - const: t0_clk
128 - const: slow_clk
129 - items:
130 - const: t0_clk
131 - const: t1_clk
132 - const: t2_clk
133 - const: slow_clk
134
135 required:
136 - compatible
137 - reg
138 - interrupts
139 - clocks
140 - clock-names
141 - '#address-cells'
142 - '#size-cells'
143
144 additionalProperties: false
145
146 examples:
147 - |
148 /* One interrupt per TC block: */
149 tcb0: timer@fff7c000 {
150 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
151 #address-cells = <1>;
152 #size-cells = <0>;
153 reg = <0xfff7c000 0x100>;
154 interrupts = <18 4>;
155 clocks = <&tcb0_clk>, <&clk32k>;
156 clock-names = "t0_clk", "slow_clk";
157
158 timer@0 {
159 compatible = "atmel,tcb-timer";
160 reg = <0>, <1>;
161 };
162
163 timer@2 {
164 compatible = "atmel,tcb-timer";
165 reg = <2>;
166 };
167 };
168
169 /* One interrupt per TC channel in a TC block: */
170 tcb1: timer@fffdc000 {
171 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
172 #address-cells = <1>;
173 #size-cells = <0>;
174 reg = <0xfffdc000 0x100>;
175 interrupts = <26 4>, <27 4>, <28 4>;
176 clocks = <&tcb1_clk>, <&clk32k>;
177 clock-names = "t0_clk", "slow_clk";
178
179 timer@0 {
180 compatible = "atmel,tcb-timer";
181 reg = <0>;
182 };
183
184 timer@1 {
185 compatible = "atmel,tcb-timer";
186 reg = <1>;
187 };
188
189 pwm@2 {
190 compatible = "atmel,tcb-pwm";
191 reg = <2>;
192 #pwm-cells = <3>;
193 };
194 };
195 /* TCB0 Capture with QDEC: */
196 timer@f800c000 {
197 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
198 #address-cells = <1>;
199 #size-cells = <0>;
200 reg = <0xfff7c000 0x100>;
201 interrupts = <18 4>;
202 clocks = <&tcb0_clk>, <&clk32k>;
203 clock-names = "t0_clk", "slow_clk";
204
205 timer@0 {
206 compatible = "microchip,tcb-capture";
207 reg = <0>, <1>;
208 };
209
210 timer@2 {
211 compatible = "atmel,tcb-timer";
212 reg = <2>;
213 };
214 };
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