1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/soc/tegra/nvidia,nvec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: NVIDIA compliant embedded controller
8
9 maintainers:
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12
13 properties:
14 compatible:
15 const: nvidia,nvec
16
17 reg:
18 maxItems: 1
19
20 interrupts:
21 maxItems: 1
22
23 clocks:
24 minItems: 1
25 items:
26 - description: divider clock
27 - description: fast clock
28
29 clock-names:
30 minItems: 1
31 items:
32 - const: div-clk
33 - const: fast-clk
34
35 resets:
36 items:
37 - description: module reset
38
39 reset-names:
40 items:
41 - const: i2c
42
43 clock-frequency: true
44
45 request-gpios:
46 description: phandle to the GPIO used for EC request
47
48 slave-addr:
49 $ref: /schemas/types.yaml#/definitions/uint32
50 description: I2C address of the slave controller
51
52 additionalProperties: false
53
54 required:
55 - compatible
56 - reg
57 - interrupts
58 - clocks
59 - clock-names
60 - resets
61 - reset-names
62 - clock-frequency
63 - request-gpios
64 - slave-addr
65
66 examples:
67 - |
68 #include <dt-bindings/clock/tegra20-car.h>
69 #include <dt-bindings/gpio/tegra-gpio.h>
70 #include <dt-bindings/interrupt-controller/arm-gic.h>
71
72 i2c@7000c500 {
73 compatible = "nvidia,nvec";
74 reg = <0x7000c500 0x100>;
75 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
76 clock-frequency = <80000>;
77 request-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
78 slave-addr = <138>;
79 clocks = <&tegra_car TEGRA20_CLK_I2C3>,
80 <&tegra_car TEGRA20_CLK_PLL_P_OUT3>;
81 clock-names = "div-clk", "fast-clk";
82 resets = <&tegra_car 67>;
83 reset-names = "i2c";
84 };
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