1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/sound/davinci-mcbsp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: McBSP Controller for TI SoCs
8
9 maintainers:
10 - Bastien Curutchet <bastien.curutchet@bootlin.com>
11
12 allOf:
13 - $ref: dai-common.yaml#
14
15 properties:
16 compatible:
17 enum:
18 - ti,da850-mcbsp
19
20 reg:
21 minItems: 1
22 items:
23 - description: CFG registers
24 - description: data registers
25
26 reg-names:
27 minItems: 1
28 items:
29 - const: mpu
30 - const: dat
31
32 dmas:
33 items:
34 - description: transmission DMA channel
35 - description: reception DMA channel
36
37 dma-names:
38 items:
39 - const: tx
40 - const: rx
41
42 interrupts:
43 items:
44 - description: RX interrupt
45 - description: TX interrupt
46
47 interrupt-names:
48 items:
49 - const: rx
50 - const: tx
51
52 clocks:
53 minItems: 1
54 items:
55 - description: functional clock
56 - description: external input clock for sample rate generator.
57
58 clock-names:
59 minItems: 1
60 items:
61 - const: fck
62 - const: clks
63
64 power-domains:
65 maxItems: 1
66
67 "#sound-dai-cells":
68 const: 0
69
70 ti,T1-framing-tx:
71 $ref: /schemas/types.yaml#/definitions/flag
72 description:
73 If the property is present, tx data delay is set to 2 bit clock periods.
74 McBSP will insert a blank period (high-impedance period) before the first
75 data bit. This can be used to interface to T1-framing devices.
76
77 ti,T1-framing-rx:
78 $ref: /schemas/types.yaml#/definitions/flag
79 description:
80 If the property is present, rx data delay is set to 2 bit clock periods.
81 McBSP will discard the bit preceding the data stream (called framing bit).
82 This can be used to interface to T1-framing devices.
83
84 required:
85 - "#sound-dai-cells"
86 - compatible
87 - reg
88 - reg-names
89 - dmas
90 - dma-names
91 - clocks
92
93 unevaluatedProperties: false
94
95 examples:
96 - |
97 mcbsp0@1d10000 {
98 #sound-dai-cells = <0>;
99 compatible = "ti,da850-mcbsp";
100 pinctrl-names = "default";
101 pinctrl-0 = <&mcbsp0_pins>;
102
103 reg = <0x111000 0x1000>,
104 <0x311000 0x1000>;
105 reg-names = "mpu", "dat";
106 interrupts = <97>, <98>;
107 interrupt-names = "rx", "tx";
108 dmas = <&edma0 3 1>,
109 <&edma0 2 1>;
110 dma-names = "tx", "rx";
111
112 clocks = <&psc1 14>;
113 };
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