1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/sound/fsl,esai.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Freescale Enhanced Serial Audio Interface (ESAI) Controller
8
9 maintainers:
10 - Shengjiu Wang <shengjiu.wang@nxp.com>
11 - Frank Li <Frank.Li@nxp.com>
12
13 description:
14 The Enhanced Serial Audio Interface (ESAI) provides a full-duplex serial port
15 for serial communication with a variety of serial devices, including industry
16 standard codecs, Sony/Phillips Digital Interface (S/PDIF) transceivers, and
17 other DSPs. It has up to six transmitters and four receivers.
18
19 properties:
20 compatible:
21 enum:
22 - fsl,imx35-esai
23 - fsl,imx6ull-esai
24 - fsl,imx8qm-esai
25 - fsl,vf610-esai
26
27 reg:
28 maxItems: 1
29
30 interrupts:
31 maxItems: 1
32
33 clocks:
34 minItems: 3
35 items:
36 - description:
37 The core clock used to access registers.
38 - description:
39 The esai baud clock for esai controller used to
40 derive HCK, SCK and FS.
41 - description:
42 The system clock derived from ahb clock used to
43 derive HCK, SCK and FS.
44 - description:
45 The spba clock is required when ESAI is placed as a
46 bus slave of the Shared Peripheral Bus and when two
47 or more bus masters (CPU, DMA or DSP) try to access
48 it. This property is optional depending on the SoC
49 design.
50
51 clock-names:
52 minItems: 3
53 items:
54 - const: core
55 - const: extal
56 - const: fsys
57 - const: spba
58
59 dmas:
60 minItems: 2
61 maxItems: 2
62
63 dma-names:
64 items:
65 - const: rx
66 - const: tx
67
68 fsl,fifo-depth:
69 $ref: /schemas/types.yaml#/definitions/uint32
70 default: 64
71 description:
72 The number of elements in the transmit and receive
73 FIFOs. This number is the maximum allowed value for
74 TFCR[TFWM] or RFCR[RFWM].
75
76 fsl,esai-synchronous:
77 $ref: /schemas/types.yaml#/definitions/flag
78 description:
79 This is a boolean property. If present, indicating
80 that ESAI would work in the synchronous mode, which
81 means all the settings for Receiving would be
82 duplicated from Transmission related registers.
83
84 big-endian:
85 $ref: /schemas/types.yaml#/definitions/flag
86 description:
87 If this property is absent, the native endian mode
88 will be in use as default, or the big endian mode
89 will be in use for all the device registers.
90
91 required:
92 - compatible
93 - reg
94 - interrupts
95 - clocks
96 - clock-names
97 - dmas
98 - dma-names
99
100 unevaluatedProperties: false
101
102 allOf:
103 - $ref: dai-common.yaml#
104
105 examples:
106 - |
107 esai@2024000 {
108 compatible = "fsl,imx35-esai";
109 reg = <0x02024000 0x4000>;
110 interrupts = <0 51 0x04>;
111 clocks = <&clks 208>, <&clks 118>, <&clks 208>;
112 clock-names = "core", "extal", "fsys";
113 dmas = <&sdma 23 21 0>, <&sdma 24 21 0>;
114 dma-names = "rx", "tx";
115 fsl,fifo-depth = <128>;
116 fsl,esai-synchronous;
117 big-endian;
118 };
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