1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 %YAML 1.2 3 --- 4 $id: http://devicetree.org/schemas/sound/fsl,imx-asrc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 6 7 title: Freescale Asynchronous Sample Rate Converter (ASRC) Controller 8 9 description: 10 The Asynchronous Sample Rate Converter (ASRC) converts the sampling rate of 11 a signal associated with an input clock into a signal associated with a 12 different output clock. The driver currently works as a Front End of DPCM 13 with other Back Ends Audio controller such as ESAI, SSI and SAI. It has 14 three pairs to support three substreams within totally 10 channels. 15 16 maintainers: 17 - Shawn Guo <shawnguo@kernel.org> 18 - Sascha Hauer <s.hauer@pengutronix.de> 19 20 properties: 21 compatible: 22 oneOf: 23 - enum: 24 - fsl,imx35-asrc 25 - fsl,imx53-asrc 26 - fsl,imx8qm-asrc 27 - fsl,imx8qxp-asrc 28 - items: 29 - enum: 30 - fsl,imx6sx-asrc 31 - fsl,imx6ul-asrc 32 - const: fsl,imx53-asrc 33 34 reg: 35 maxItems: 1 36 37 interrupts: 38 maxItems: 1 39 40 dmas: 41 maxItems: 6 42 43 dma-names: 44 items: 45 - const: rxa 46 - const: rxb 47 - const: rxc 48 - const: txa 49 - const: txb 50 - const: txc 51 52 clocks: 53 maxItems: 19 54 55 clock-names: 56 items: 57 - const: mem 58 - const: ipg 59 - const: asrck_0 60 - const: asrck_1 61 - const: asrck_2 62 - const: asrck_3 63 - const: asrck_4 64 - const: asrck_5 65 - const: asrck_6 66 - const: asrck_7 67 - const: asrck_8 68 - const: asrck_9 69 - const: asrck_a 70 - const: asrck_b 71 - const: asrck_c 72 - const: asrck_d 73 - const: asrck_e 74 - const: asrck_f 75 - const: spba 76 77 power-domains: 78 maxItems: 1 79 80 fsl,asrc-rate: 81 $ref: /schemas/types.yaml#/definitions/uint32 82 description: The mutual sample rate used by DPCM Back Ends 83 84 fsl,asrc-width: 85 $ref: /schemas/types.yaml#/definitions/uint32 86 description: The mutual sample width used by DPCM Back Ends 87 enum: [16, 24] 88 89 fsl,asrc-clk-map: 90 $ref: /schemas/types.yaml#/definitions/uint32 91 description: 92 Defines clock map used in driver 93 <0> - select the map for asrc0 in imx8qm/imx8qxp 94 <1> - select the map for asrc1 in imx8qm/imx8qxp 95 enum: [0, 1] 96 97 big-endian: 98 type: boolean 99 description: 100 If this property is absent, the little endian mode will be in use as 101 default. Otherwise, the big endian mode will be in use for all the 102 device registers. 103 104 fsl,asrc-format: 105 $ref: /schemas/types.yaml#/definitions/uint32 106 description: 107 Defines a mutual sample format used by DPCM Back Ends, which can 108 replace the fsl,asrc-width. The value is 2 (S16_LE), or 6 (S24_LE). 109 enum: [2, 6] 110 111 required: 112 - compatible 113 - reg 114 - interrupts 115 - dmas 116 - dma-names 117 - clocks 118 - clock-names 119 - fsl,asrc-rate 120 - fsl,asrc-width 121 122 allOf: 123 - if: 124 properties: 125 compatible: 126 contains: 127 enum: 128 - fsl,imx8qm-asrc 129 - fsl,imx8qxp-asrc 130 then: 131 required: 132 - fsl,asrc-clk-map 133 else: 134 properties: 135 fsl,asrc-clk-map: false 136 137 - if: 138 properties: 139 compatible: 140 contains: 141 enum: 142 - fsl,imx8qm-asrc 143 - fsl,imx8qxp-asrc 144 then: 145 required: 146 - power-domains 147 148 additionalProperties: false 149 150 examples: 151 - | 152 #include <dt-bindings/interrupt-controller/irq.h> 153 #include <dt-bindings/clock/imx6qdl-clock.h> 154 asrc: asrc@2034000 { 155 compatible = "fsl,imx53-asrc"; 156 reg = <0x02034000 0x4000>; 157 interrupts = <0 50 IRQ_TYPE_LEVEL_HIGH>; 158 clocks = <&clks IMX6QDL_CLK_ASRC_IPG>, 159 <&clks IMX6QDL_CLK_ASRC_MEM>, <&clks 0>, 160 <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>, 161 <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>, 162 <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>, 163 <&clks IMX6QDL_CLK_ASRC>, <&clks 0>, <&clks 0>, 164 <&clks IMX6QDL_CLK_SPBA>; 165 clock-names = "mem", "ipg", "asrck_0", 166 "asrck_1", "asrck_2", "asrck_3", "asrck_4", 167 "asrck_5", "asrck_6", "asrck_7", "asrck_8", 168 "asrck_9", "asrck_a", "asrck_b", "asrck_c", 169 "asrck_d", "asrck_e", "asrck_f", "spba"; 170 dmas = <&sdma 17 23 1>, <&sdma 18 23 1>, <&sdma 19 23 1>, 171 <&sdma 20 23 1>, <&sdma 21 23 1>, <&sdma 22 23 1>; 172 dma-names = "rxa", "rxb", "rxc", 173 "txa", "txb", "txc"; 174 fsl,asrc-rate = <48000>; 175 fsl,asrc-width = <16>; 176 };
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