1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/sound/fsl,xcvr.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: NXP Audio Transceiver (XCVR) Controller
8
9 maintainers:
10 - Viorel Suman <viorel.suman@nxp.com>
11
12 description: |
13 NXP XCVR (Audio Transceiver) is a on-chip functional module
14 that allows CPU to receive and transmit digital audio via
15 HDMI2.1 eARC, HDMI1.4 ARC and SPDIF.
16
17 properties:
18 $nodename:
19 pattern: "^xcvr@.*"
20
21 compatible:
22 enum:
23 - fsl,imx8mp-xcvr
24 - fsl,imx93-xcvr
25 - fsl,imx95-xcvr
26
27 reg:
28 items:
29 - description: 20K RAM for code and data
30 - description: registers space
31 - description: RX FIFO address
32 - description: TX FIFO address
33
34 reg-names:
35 items:
36 - const: ram
37 - const: regs
38 - const: rxfifo
39 - const: txfifo
40
41 interrupts:
42 items:
43 - description: WAKEUPMIX Audio XCVR Interrupt 1
44 - description: WAKEUPMIX Audio XCVR Interrupt 2
45 - description: SPDIF wakeup interrupt from PHY
46 minItems: 1
47
48 clocks:
49 items:
50 - description: Peripheral clock
51 - description: PHY clock
52 - description: SPBA clock
53 - description: PLL clock
54 - description: PLL clock source for 8kHz series
55 - description: PLL clock source for 11kHz series
56 minItems: 4
57
58 clock-names:
59 items:
60 - const: ipg
61 - const: phy
62 - const: spba
63 - const: pll_ipg
64 - const: pll8k
65 - const: pll11k
66 minItems: 4
67
68 dmas:
69 items:
70 - description: DMA controller phandle and request line for RX
71 - description: DMA controller phandle and request line for TX
72
73 dma-names:
74 items:
75 - const: rx
76 - const: tx
77
78 resets:
79 maxItems: 1
80
81 required:
82 - compatible
83 - reg
84 - reg-names
85 - interrupts
86 - clocks
87 - clock-names
88 - dmas
89 - dma-names
90
91 allOf:
92 - $ref: dai-common.yaml#
93 - if:
94 properties:
95 compatible:
96 contains:
97 const: fsl,imx8mp-xcvr
98 then:
99 required:
100 - resets
101
102 - if:
103 properties:
104 compatible:
105 contains:
106 enum:
107 - fsl,imx93-xcvr
108 - fsl,imx95-xcvr
109 then:
110 properties:
111 interrupts:
112 minItems: 2
113 maxItems: 2
114 else:
115 properties:
116 interrupts:
117 minItems: 3
118 maxItems: 3
119
120 - if:
121 properties:
122 compatible:
123 contains:
124 enum:
125 - fsl,imx8mp-xcvr
126 - fsl,imx93-xcvr
127 then:
128 properties:
129 clocks:
130 maxItems: 4
131 clock-names:
132 maxItems: 4
133
134 unevaluatedProperties: false
135
136 examples:
137 - |
138 #include <dt-bindings/interrupt-controller/arm-gic.h>
139 #include <dt-bindings/clock/imx8mp-clock.h>
140 #include <dt-bindings/reset/imx8mp-reset.h>
141
142 xcvr: xcvr@30cc0000 {
143 compatible = "fsl,imx8mp-xcvr";
144 reg = <0x30cc0000 0x800>,
145 <0x30cc0800 0x400>,
146 <0x30cc0c00 0x080>,
147 <0x30cc0e00 0x080>;
148 reg-names = "ram", "regs", "rxfifo", "txfifo";
149 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
150 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
151 <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
152 clocks = <&audiomix_clk IMX8MP_CLK_AUDIOMIX_EARC_IPG>,
153 <&audiomix_clk IMX8MP_CLK_AUDIOMIX_EARC_PHY>,
154 <&audiomix_clk IMX8MP_CLK_AUDIOMIX_SPBA2_ROOT>,
155 <&audiomix_clk IMX8MP_CLK_AUDIOMIX_AUDPLL_ROOT>;
156 clock-names = "ipg", "phy", "spba", "pll_ipg";
157 dmas = <&sdma2 30 2 0>, <&sdma2 31 2 0>;
158 dma-names = "rx", "tx";
159 resets = <&audiomix_reset 0>;
160 };
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