1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra-audio-rt5677.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: NVIDIA Tegra audio complex with RT5677 CODEC
8
9 maintainers:
10 - Jon Hunter <jonathanh@nvidia.com>
11 - Thierry Reding <thierry.reding@gmail.com>
12
13 allOf:
14 - $ref: nvidia,tegra-audio-common.yaml#
15
16 properties:
17 compatible:
18 items:
19 - pattern: '^[a-z0-9]+,tegra-audio-rt5677(-[a-z0-9]+)+$'
20 - const: nvidia,tegra-audio-rt5677
21
22 nvidia,audio-routing:
23 $ref: /schemas/types.yaml#/definitions/non-unique-string-array
24 description: |
25 A list of the connections between audio components.
26 Each entry is a pair of strings, the first being the connection's sink,
27 the second being the connection's source. Valid names for sources and
28 sinks are the pins (documented in the binding document),
29 and the jacks on the board.
30 minItems: 2
31 items:
32 enum:
33 # Board Connectors
34 - Headphone
35 - Speaker
36 - Headset Mic
37 - Internal Mic 1
38 - Internal Mic 2
39
40 # CODEC Pins
41 - IN1P
42 - IN1N
43 - IN2P
44 - IN2N
45 - MICBIAS1
46 - DMIC1
47 - DMIC2
48 - DMIC3
49 - DMIC4
50 - DMIC L1
51 - DMIC L2
52 - DMIC L3
53 - DMIC L4
54 - DMIC R1
55 - DMIC R2
56 - DMIC R3
57 - DMIC R4
58 - LOUT1
59 - LOUT2
60 - LOUT3
61 - PDM1L
62 - PDM1R
63 - PDM2L
64 - PDM2R
65
66 required:
67 - nvidia,i2s-controller
68
69 unevaluatedProperties: false
70
71 examples:
72 - |
73 sound {
74 compatible = "nvidia,tegra-audio-rt5677-ryu",
75 "nvidia,tegra-audio-rt5677";
76 nvidia,model = "NVIDIA Tegra Ryu";
77
78 nvidia,audio-routing =
79 "Headphone", "LOUT2",
80 "Headphone", "LOUT1",
81 "Headset Mic", "MICBIAS1",
82 "IN1P", "Headset Mic",
83 "IN1N", "Headset Mic",
84 "DMIC L1", "Internal Mic 1",
85 "DMIC R1", "Internal Mic 1",
86 "DMIC L2", "Internal Mic 2",
87 "DMIC R2", "Internal Mic 2",
88 "Speaker", "PDM1L",
89 "Speaker", "PDM1R";
90
91 nvidia,i2s-controller = <&tegra_i2s1>;
92 nvidia,audio-codec = <&rt5677>;
93
94 nvidia,hp-det-gpios = <&gpio 143 0>;
95
96 clocks = <&clk 216>,
97 <&clk 217>,
98 <&clk 121>;
99 clock-names = "pll_a", "pll_a_out0", "mclk";
100 };
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