1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra186-dspk.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Tegra186 DSPK Controller
8
9 description: |
10 The Digital Speaker Controller (DSPK) can be viewed as a Pulse
11 Density Modulation (PDM) transmitter that up-samples the input to
12 the desired sampling rate by interpolation and then converts the
13 over sampled Pulse Code Modulation (PCM) input to the desired 1-bit
14 output via Delta Sigma Modulation (DSM).
15
16 maintainers:
17 - Jon Hunter <jonathanh@nvidia.com>
18 - Sameer Pujar <spujar@nvidia.com>
19
20 allOf:
21 - $ref: dai-common.yaml#
22
23 properties:
24 $nodename:
25 pattern: "^dspk@[0-9a-f]*$"
26
27 compatible:
28 oneOf:
29 - const: nvidia,tegra186-dspk
30 - items:
31 - enum:
32 - nvidia,tegra234-dspk
33 - nvidia,tegra194-dspk
34 - const: nvidia,tegra186-dspk
35
36 reg:
37 maxItems: 1
38
39 clocks:
40 maxItems: 1
41
42 clock-names:
43 const: dspk
44
45 assigned-clocks:
46 maxItems: 1
47
48 assigned-clock-parents:
49 maxItems: 1
50
51 assigned-clock-rates:
52 maxItems: 1
53
54 sound-name-prefix:
55 pattern: "^DSPK[1-9]$"
56
57 ports:
58 $ref: /schemas/graph.yaml#/properties/ports
59 properties:
60 port@0:
61 $ref: audio-graph-port.yaml#
62 unevaluatedProperties: false
63 description: |
64 DSPK ACIF (Audio Client Interface) port connected to the
65 corresponding AHUB (Audio Hub) ACIF port.
66
67 port@1:
68 $ref: audio-graph-port.yaml#
69 unevaluatedProperties: false
70 description: |
71 DSPK DAP (Digital Audio Port) interface which can be connected
72 to external audio codec for playback.
73
74 required:
75 - compatible
76 - reg
77 - clocks
78 - clock-names
79 - assigned-clocks
80 - assigned-clock-parents
81 - sound-name-prefix
82
83 additionalProperties: false
84
85 examples:
86 - |
87 #include<dt-bindings/clock/tegra186-clock.h>
88
89 dspk@2905000 {
90 compatible = "nvidia,tegra186-dspk";
91 reg = <0x2905000 0x100>;
92 clocks = <&bpmp TEGRA186_CLK_DSPK1>;
93 clock-names = "dspk";
94 assigned-clocks = <&bpmp TEGRA186_CLK_DSPK1>;
95 assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
96 assigned-clock-rates = <12288000>;
97 sound-name-prefix = "DSPK1";
98 };
99
100 ...
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