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Linux/Documentation/devicetree/bindings/sound/nvidia,tegra210-admaif.yaml

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  1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2 %YAML 1.2
  3 ---
  4 $id: http://devicetree.org/schemas/sound/nvidia,tegra210-admaif.yaml#
  5 $schema: http://devicetree.org/meta-schemas/core.yaml#
  6 
  7 title: Tegra210 ADMAIF
  8 
  9 description: |
 10   ADMAIF is the interface between ADMA and AHUB. Each ADMA channel
 11   that sends/receives data to/from AHUB must interface through an
 12   ADMAIF channel. ADMA channel sending data to AHUB pairs with ADMAIF
 13   Tx channel and ADMA channel receiving data from AHUB pairs with
 14   ADMAIF Rx channel.
 15 
 16 maintainers:
 17   - Jon Hunter <jonathanh@nvidia.com>
 18   - Sameer Pujar <spujar@nvidia.com>
 19 
 20 properties:
 21   $nodename:
 22     pattern: "^admaif@[0-9a-f]*$"
 23 
 24   compatible:
 25     oneOf:
 26       - enum:
 27           - nvidia,tegra210-admaif
 28           - nvidia,tegra186-admaif
 29       - items:
 30           - enum:
 31               - nvidia,tegra234-admaif
 32               - nvidia,tegra194-admaif
 33           - const: nvidia,tegra186-admaif
 34 
 35   reg:
 36     maxItems: 1
 37 
 38   dmas: true
 39 
 40   dma-names: true
 41 
 42   ports:
 43     $ref: /schemas/graph.yaml#/properties/ports
 44     description: |
 45       Contains list of ACIF (Audio CIF) port nodes for ADMAIF channels.
 46       The number of port nodes depends on the number of ADMAIF channels
 47       that SoC may have. These are interfaced with respective ACIF ports
 48       in AHUB (Audio Hub). Each port is capable of data transfers in
 49       both directions.
 50 
 51     patternProperties:
 52       '^port@[0-9]':
 53         $ref: audio-graph-port.yaml#
 54         unevaluatedProperties: false
 55 
 56 if:
 57   properties:
 58     compatible:
 59       contains:
 60         const: nvidia,tegra210-admaif
 61 
 62 then:
 63   properties:
 64     dmas:
 65       description:
 66         DMA channel specifiers, equally divided for Tx and Rx.
 67       minItems: 1
 68       maxItems: 20
 69     dma-names:
 70       items:
 71         pattern: "^[rt]x(10|[1-9])$"
 72       description:
 73         Should be "rx1", "rx2" ... "rx10" for DMA Rx channel
 74         Should be "tx1", "tx2" ... "tx10" for DMA Tx channel
 75       minItems: 1
 76       maxItems: 20
 77 
 78 else:
 79   properties:
 80     dmas:
 81       description:
 82         DMA channel specifiers, equally divided for Tx and Rx.
 83       minItems: 1
 84       maxItems: 40
 85     dma-names:
 86       items:
 87         pattern: "^[rt]x(1[0-9]|[1-9]|20)$"
 88       description:
 89         Should be "rx1", "rx2" ... "rx20" for DMA Rx channel
 90         Should be "tx1", "tx2" ... "tx20" for DMA Tx channel
 91       minItems: 1
 92       maxItems: 40
 93 
 94 required:
 95   - compatible
 96   - reg
 97   - dmas
 98   - dma-names
 99 
100 additionalProperties: false
101 
102 examples:
103   - |
104     admaif@702d0000 {
105         compatible = "nvidia,tegra210-admaif";
106         reg = <0x702d0000 0x800>;
107         dmas = <&adma 1>,  <&adma 1>,
108                <&adma 2>,  <&adma 2>,
109                <&adma 3>,  <&adma 3>,
110                <&adma 4>,  <&adma 4>,
111                <&adma 5>,  <&adma 5>,
112                <&adma 6>,  <&adma 6>,
113                <&adma 7>,  <&adma 7>,
114                <&adma 8>,  <&adma 8>,
115                <&adma 9>,  <&adma 9>,
116                <&adma 10>, <&adma 10>;
117         dma-names = "rx1",  "tx1",
118                     "rx2",  "tx2",
119                     "rx3",  "tx3",
120                     "rx4",  "tx4",
121                     "rx5",  "tx5",
122                     "rx6",  "tx6",
123                     "rx7",  "tx7",
124                     "rx8",  "tx8",
125                     "rx9",  "tx9",
126                     "rx10", "tx10";
127     };
128 
129 ...

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