1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/spi/fsl,dspi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: ARM Freescale DSPI controller
8
9 maintainers:
10 - Frank Li <Frank.Li@nxp.com>
11
12 properties:
13 compatible:
14 oneOf:
15 - enum:
16 - fsl,vf610-dspi
17 - fsl,ls1021a-v1.0-dspi
18 - fsl,ls1012a-dspi
19 - fsl,ls1028a-dspi
20 - fsl,ls1043a-dspi
21 - fsl,ls1046a-dspi
22 - fsl,ls1088a-dspi
23 - fsl,ls2080a-dspi
24 - fsl,ls2085a-dspi
25 - fsl,lx2160a-dspi
26 - items:
27 - enum:
28 - fsl,ls1012a-dspi
29 - fsl,ls1028a-dspi
30 - fsl,ls1043a-dspi
31 - fsl,ls1046a-dspi
32 - fsl,ls1088a-dspi
33 - const: fsl,ls1021a-v1.0-dspi
34 - items:
35 - const: fsl,ls2080a-dspi
36 - const: fsl,ls2085a-dspi
37 - items:
38 - const: fsl,lx2160a-dspi
39 - const: fsl,ls2085a-dspi
40
41 reg:
42 maxItems: 1
43
44 interrupts:
45 maxItems: 1
46
47 clocks:
48 maxItems: 1
49
50 clock-names:
51 items:
52 - const: dspi
53
54 dmas:
55 items:
56 - description: DMA controller phandle and request line for TX
57 - description: DMA controller phandle and request line for RX
58
59 dma-names:
60 items:
61 - const: tx
62 - const: rx
63
64 spi-num-chipselects:
65 $ref: /schemas/types.yaml#/definitions/uint32
66 description:
67 The number of the chip native chipselect signals.
68 cs-gpios don't count against this number.
69
70 big-endian: true
71
72 bus-num:
73 $ref: /schemas/types.yaml#/definitions/uint32
74 description: SoC-specific identifier for the SPI controller.
75
76 required:
77 - compatible
78 - reg
79 - clocks
80 - clock-names
81 - spi-num-chipselects
82
83 allOf:
84 - $ref: spi-controller.yaml#
85
86 unevaluatedProperties: false
87
88 examples:
89 - |
90 #include <dt-bindings/interrupt-controller/arm-gic.h>
91 #include <dt-bindings/clock/vf610-clock.h>
92
93 spi@4002c000 {
94 compatible = "fsl,vf610-dspi";
95 reg = <0x4002c000 0x1000>;
96 #address-cells = <1>;
97 #size-cells = <0>;
98 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
99 clocks = <&clks VF610_CLK_DSPI0>;
100 clock-names = "dspi";
101 spi-num-chipselects = <5>;
102 bus-num = <0>;
103 pinctrl-names = "default";
104 pinctrl-0 = <&pinctrl_dspi0_1>;
105 big-endian;
106
107 flash@0 {
108 compatible = "jedec,spi-nor";
109 reg = <0>;
110 spi-max-frequency = <16000000>;
111 spi-cpol;
112 spi-cpha;
113 spi-cs-setup-delay-ns = <100>;
114 spi-cs-hold-delay-ns = <50>;
115 };
116 };
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