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TOMOYO Linux Cross Reference
Linux/Documentation/devicetree/bindings/spi/nuvoton,npcm-fiu.txt

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  1 * Nuvoton FLASH Interface Unit (FIU) SPI Controller
  2 
  3 NPCM FIU supports single, dual and quad communication interface.
  4 
  5 The NPCM7XX supports three FIU modules,
  6 FIU0 and FIUx supports two chip selects,
  7 FIU3 support four chip select.
  8 
  9 The NPCM8XX supports four FIU modules,
 10 FIU0 and FIUx supports two chip selects,
 11 FIU1 and FIU3 supports four chip selects.
 12 
 13 Required properties:
 14   - compatible : "nuvoton,npcm750-fiu" for Poleg NPCM7XX BMC
 15                              "nuvoton,npcm845-fiu" for Arbel NPCM8XX BMC
 16   - #address-cells : should be 1.
 17   - #size-cells : should be 0.
 18   - reg : the first contains the register location and length,
 19           the second contains the memory mapping address and length
 20   - reg-names: Should contain the reg names "control" and "memory"
 21   - clocks : phandle of FIU reference clock.
 22 
 23 Required properties in case the pins can be muxed:
 24   - pinctrl-names : a pinctrl state named "default" must be defined.
 25   - pinctrl-0 : phandle referencing pin configuration of the device.
 26 
 27 Optional property:
 28   - nuvoton,spix-mode: enable spix-mode for an expansion bus to an ASIC or CPLD.
 29 
 30 Aliases:
 31 - All the FIU controller nodes should be represented in the aliases node using
 32   the following format 'fiu{n}' where n is a unique number for the alias.
 33   In the NPCM7XX BMC:
 34                 fiu0 represent fiu 0 controller
 35                 fiu1 represent fiu 3 controller
 36                 fiu2 represent fiu x controller
 37 
 38   In the NPCM8XX BMC:
 39                 fiu0 represent fiu 0 controller
 40                 fiu1 represent fiu 1 controller
 41                 fiu2 represent fiu 3 controller
 42                 fiu3 represent fiu x controller
 43 
 44 Example:
 45 fiu3: spi@c00000000 {
 46         compatible = "nuvoton,npcm750-fiu";
 47         #address-cells = <1>;
 48         #size-cells = <0>;
 49         reg = <0xfb000000 0x1000>, <0x80000000 0x10000000>;
 50         reg-names = "control", "memory";
 51         clocks = <&clk NPCM7XX_CLK_AHB>;
 52         pinctrl-names = "default";
 53         pinctrl-0 = <&spi3_pins>;
 54         flash@0 {
 55                         ...
 56         };
 57 };
 58 

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