1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/spi/nvidia,tegra210-quad.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Tegra Quad SPI Controller
8
9 maintainers:
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
12
13 allOf:
14 - $ref: spi-controller.yaml#
15
16 properties:
17 compatible:
18 enum:
19 - nvidia,tegra210-qspi
20 - nvidia,tegra186-qspi
21 - nvidia,tegra194-qspi
22 - nvidia,tegra234-qspi
23 - nvidia,tegra241-qspi
24
25 reg:
26 maxItems: 1
27
28 interrupts:
29 maxItems: 1
30
31 clock-names:
32 items:
33 - const: qspi
34 - const: qspi_out
35
36 clocks:
37 maxItems: 2
38
39 resets:
40 maxItems: 1
41
42 dmas:
43 maxItems: 2
44
45 dma-names:
46 items:
47 - const: rx
48 - const: tx
49
50 patternProperties:
51 "@[0-9a-f]+$":
52 type: object
53 additionalProperties: true
54
55 properties:
56 spi-rx-bus-width:
57 enum: [1, 2, 4]
58
59 spi-tx-bus-width:
60 enum: [1, 2, 4]
61
62 required:
63 - compatible
64 - reg
65 - interrupts
66 - clock-names
67 - clocks
68 - resets
69
70 unevaluatedProperties: false
71
72 examples:
73 - |
74 #include <dt-bindings/clock/tegra210-car.h>
75 #include <dt-bindings/reset/tegra210-car.h>
76 #include <dt-bindings/interrupt-controller/arm-gic.h>
77 spi@70410000 {
78 compatible = "nvidia,tegra210-qspi";
79 reg = <0x70410000 0x1000>;
80 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
81 #address-cells = <1>;
82 #size-cells = <0>;
83 clocks = <&tegra_car TEGRA210_CLK_QSPI>,
84 <&tegra_car TEGRA210_CLK_QSPI_PM>;
85 clock-names = "qspi", "qspi_out";
86 resets = <&tegra_car 211>;
87 dmas = <&apbdma 5>, <&apbdma 5>;
88 dma-names = "rx", "tx";
89
90 flash@0 {
91 compatible = "jedec,spi-nor";
92 reg = <0>;
93 spi-max-frequency = <104000000>;
94 spi-tx-bus-width = <2>;
95 spi-rx-bus-width = <2>;
96 nvidia,tx-clk-tap-delay = <0>;
97 nvidia,rx-clk-tap-delay = <0>;
98 };
99 };
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