1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/spi/samsung,spi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Samsung S3C/S5P/Exynos SoC SPI controller
8
9 maintainers:
10 - Krzysztof Kozlowski <krzk@kernel.org>
11
12 description:
13 All the SPI controller nodes should be represented in the aliases node using
14 the following format 'spi{n}' where n is a unique number for the alias.
15
16 properties:
17 compatible:
18 oneOf:
19 - enum:
20 - google,gs101-spi
21 - samsung,s3c2443-spi # for S3C2443, S3C2416 and S3C2450
22 - samsung,s3c6410-spi
23 - samsung,s5pv210-spi # for S5PV210 and S5PC110
24 - samsung,exynos4210-spi
25 - samsung,exynos5433-spi
26 - samsung,exynos850-spi
27 - samsung,exynosautov9-spi
28 - tesla,fsd-spi
29 - const: samsung,exynos7-spi
30 deprecated: true
31
32 clocks:
33 minItems: 2
34 maxItems: 3
35
36 clock-names:
37 minItems: 2
38 maxItems: 3
39
40 dmas:
41 minItems: 2
42 maxItems: 2
43
44 dma-names:
45 items:
46 - const: tx
47 - const: rx
48
49 interrupts:
50 maxItems: 1
51
52 no-cs-readback:
53 description:
54 The CS line is disconnected, therefore the device should not operate
55 based on CS signalling.
56 type: boolean
57
58 num-cs:
59 minimum: 1
60 maximum: 4
61 default: 1
62
63 samsung,spi-src-clk:
64 description:
65 If the spi controller includes a internal clock mux to select the clock
66 source for the spi bus clock, this property can be used to indicate the
67 clock to be used for driving the spi bus clock. If not specified, the
68 clock number 0 is used as default.
69 $ref: /schemas/types.yaml#/definitions/uint32
70 default: 0
71
72 reg:
73 maxItems: 1
74
75 required:
76 - compatible
77 - clocks
78 - clock-names
79 - interrupts
80 - reg
81
82 allOf:
83 - $ref: spi-controller.yaml#
84 - if:
85 properties:
86 compatible:
87 contains:
88 enum:
89 - samsung,exynos5433-spi
90 - samsung,exynosautov9-spi
91 then:
92 properties:
93 clocks:
94 minItems: 3
95 maxItems: 3
96 clock-names:
97 items:
98 - const: spi
99 - enum:
100 - spi_busclk0
101 - spi_busclk1
102 - spi_busclk2
103 - spi_busclk3
104 - const: spi_ioclk
105 else:
106 properties:
107 clocks:
108 minItems: 2
109 maxItems: 2
110 clock-names:
111 items:
112 - const: spi
113 - enum:
114 - spi_busclk0
115 - spi_busclk1
116 - spi_busclk2
117 - spi_busclk3
118
119 unevaluatedProperties: false
120
121 examples:
122 - |
123 #include <dt-bindings/clock/exynos5433.h>
124 #include <dt-bindings/clock/samsung,s2mps11.h>
125 #include <dt-bindings/interrupt-controller/arm-gic.h>
126 #include <dt-bindings/gpio/gpio.h>
127
128 spi@14d30000 {
129 compatible = "samsung,exynos5433-spi";
130 reg = <0x14d30000 0x100>;
131 interrupts = <GIC_SPI 433 IRQ_TYPE_LEVEL_HIGH>;
132 dmas = <&pdma0 11>, <&pdma0 10>;
133 dma-names = "tx", "rx";
134 #address-cells = <1>;
135 #size-cells = <0>;
136 clocks = <&cmu_peric CLK_PCLK_SPI1>,
137 <&cmu_peric CLK_SCLK_SPI1>,
138 <&cmu_peric CLK_SCLK_IOCLK_SPI1>;
139 clock-names = "spi",
140 "spi_busclk0",
141 "spi_ioclk";
142 samsung,spi-src-clk = <0>;
143 pinctrl-names = "default";
144 pinctrl-0 = <&spi1_bus>;
145 num-cs = <1>;
146
147 cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH>;
148
149 audio-codec@0 {
150 compatible = "wlf,wm5110";
151 reg = <0x0>;
152 spi-max-frequency = <20000000>;
153 interrupt-parent = <&gpa0>;
154 interrupts = <4 IRQ_TYPE_NONE>;
155 clocks = <&pmu_system_controller 0>,
156 <&s2mps13_osc S2MPS11_CLK_BT>;
157 clock-names = "mclk1", "mclk2";
158
159 gpio-controller;
160 #gpio-cells = <2>;
161 interrupt-controller;
162 #interrupt-cells = <2>;
163
164 wlf,micd-detect-debounce = <300>;
165 wlf,micd-bias-start-time = <0x1>;
166 wlf,micd-rate = <0x7>;
167 wlf,micd-dbtime = <0x2>;
168 wlf,micd-force-micbias;
169 wlf,micd-configs = <0x0 1 0>;
170 wlf,hpdet-channel = <1>;
171 wlf,gpsw = <0x1>;
172 wlf,inmode = <2 0 2 0>;
173
174 wlf,reset = <&gpc0 7 GPIO_ACTIVE_HIGH>;
175 wlf,ldoena = <&gpf0 0 GPIO_ACTIVE_HIGH>;
176
177 /* core supplies */
178 AVDD-supply = <&ldo18_reg>;
179 DBVDD1-supply = <&ldo18_reg>;
180 CPVDD-supply = <&ldo18_reg>;
181 DBVDD2-supply = <&ldo18_reg>;
182 DBVDD3-supply = <&ldo18_reg>;
183 SPKVDDL-supply = <&ldo18_reg>;
184 SPKVDDR-supply = <&ldo18_reg>;
185
186 controller-data {
187 samsung,spi-feedback-delay = <0>;
188 };
189 };
190 };
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