1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/spmi/mtk,spmi-mtk-pmif.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Mediatek SPMI Controller
8
9 maintainers:
10 - Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
11
12 description: |+
13 On MediaTek SoCs the PMIC is connected via SPMI and the controller allows
14 for multiple SoCs to control a single SPMI master.
15
16 allOf:
17 - $ref: spmi.yaml
18
19 properties:
20 compatible:
21 oneOf:
22 - enum:
23 - mediatek,mt6873-spmi
24 - mediatek,mt8195-spmi
25 - items:
26 - enum:
27 - mediatek,mt8186-spmi
28 - const: mediatek,mt8195-spmi
29
30 reg:
31 maxItems: 2
32
33 reg-names:
34 items:
35 - const: pmif
36 - const: spmimst
37
38 clocks:
39 minItems: 3
40 maxItems: 3
41
42 clock-names:
43 items:
44 - const: pmif_sys_ck
45 - const: pmif_tmr_ck
46 - const: spmimst_clk_mux
47
48 assigned-clocks:
49 maxItems: 1
50
51 assigned-clock-parents:
52 maxItems: 1
53
54 required:
55 - compatible
56 - reg
57 - reg-names
58 - clocks
59 - clock-names
60
61 unevaluatedProperties: false
62
63 examples:
64 - |
65 #include <dt-bindings/clock/mt8192-clk.h>
66
67 spmi: spmi@10027000 {
68 compatible = "mediatek,mt6873-spmi";
69 reg = <0x10027000 0xe00>,
70 <0x10029000 0x100>;
71 reg-names = "pmif", "spmimst";
72 clocks = <&infracfg CLK_INFRA_PMIC_AP>,
73 <&infracfg CLK_INFRA_PMIC_TMR>,
74 <&topckgen CLK_TOP_SPMI_MST_SEL>;
75 clock-names = "pmif_sys_ck",
76 "pmif_tmr_ck",
77 "spmimst_clk_mux";
78 assigned-clocks = <&topckgen CLK_TOP_PWRAP_ULPOSC_SEL>;
79 assigned-clock-parents = <&topckgen CLK_TOP_OSC_D10>;
80 };
81 ...
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