1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/thermal/qcom,spmi-temp-alarm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Qualcomm QPNP PMIC Temperature Alarm
8
9 maintainers:
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
11
12 description:
13 QPNP temperature alarm peripherals are found inside of Qualcomm PMIC chips
14 that utilize the Qualcomm SPMI implementation. These peripherals provide an
15 interrupt signal and status register to identify high PMIC die temperature.
16
17 allOf:
18 - $ref: thermal-sensor.yaml#
19
20 properties:
21 compatible:
22 const: qcom,spmi-temp-alarm
23
24 reg:
25 maxItems: 1
26
27 interrupts:
28 maxItems: 1
29
30 io-channels:
31 items:
32 - description: ADC channel, which reports chip die temperature
33
34 io-channel-names:
35 items:
36 - const: thermal
37
38 '#thermal-sensor-cells':
39 const: 0
40
41 required:
42 - compatible
43 - reg
44 - interrupts
45
46 additionalProperties: false
47
48 examples:
49 - |
50 #include <dt-bindings/interrupt-controller/arm-gic.h>
51
52 pmic {
53 #address-cells = <1>;
54 #size-cells = <0>;
55
56 pm8350_temp_alarm: temperature-sensor@a00 {
57 compatible = "qcom,spmi-temp-alarm";
58 reg = <0xa00>;
59 interrupts = <0x1 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
60 #thermal-sensor-cells = <0>;
61 };
62 };
63
64 thermal-zones {
65 pm8350_thermal: pm8350c-thermal {
66 polling-delay-passive = <100>;
67 polling-delay = <0>;
68 thermal-sensors = <&pm8350_temp_alarm>;
69
70 trips {
71 pm8350_trip0: trip0 {
72 temperature = <95000>;
73 hysteresis = <0>;
74 type = "passive";
75 };
76
77 pm8350_crit: pm8350c-crit {
78 temperature = <115000>;
79 hysteresis = <0>;
80 type = "critical";
81 };
82 };
83 };
84 };
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