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Linux/Documentation/devicetree/bindings/thermal/rzg2l-thermal.yaml

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  1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2 %YAML 1.2
  3 ---
  4 $id: http://devicetree.org/schemas/thermal/rzg2l-thermal.yaml#
  5 $schema: http://devicetree.org/meta-schemas/core.yaml#
  6 
  7 title: Renesas RZ/G2L Thermal Sensor Unit
  8 
  9 description:
 10   On RZ/G2L SoCs, the thermal sensor unit (TSU) measures the
 11   temperature(Tj) inside the LSI.
 12 
 13 maintainers:
 14   - Biju Das <biju.das.jz@bp.renesas.com>
 15 
 16 $ref: thermal-sensor.yaml#
 17 
 18 properties:
 19   compatible:
 20     items:
 21       - enum:
 22           - renesas,r9a07g043-tsu # RZ/G2UL and RZ/Five
 23           - renesas,r9a07g044-tsu # RZ/G2{L,LC}
 24           - renesas,r9a07g054-tsu # RZ/V2L
 25       - const: renesas,rzg2l-tsu
 26 
 27   reg:
 28     maxItems: 1
 29 
 30   clocks:
 31     maxItems: 1
 32 
 33   power-domains:
 34     maxItems: 1
 35 
 36   resets:
 37     maxItems: 1
 38 
 39   "#thermal-sensor-cells":
 40     const: 1
 41 
 42 required:
 43   - compatible
 44   - reg
 45   - clocks
 46   - power-domains
 47   - resets
 48 
 49 unevaluatedProperties: false
 50 
 51 examples:
 52   - |
 53     #include <dt-bindings/clock/r9a07g044-cpg.h>
 54 
 55     tsu: thermal@10059400 {
 56         compatible = "renesas,r9a07g044-tsu",
 57                      "renesas,rzg2l-tsu";
 58         reg = <0x10059400 0x400>;
 59         clocks = <&cpg CPG_MOD R9A07G044_TSU_PCLK>;
 60         resets = <&cpg R9A07G044_TSU_PRESETN>;
 61         power-domains = <&cpg>;
 62         #thermal-sensor-cells = <1>;
 63     };
 64 
 65     thermal-zones {
 66         cpu-thermal {
 67             polling-delay-passive = <250>;
 68             polling-delay = <1000>;
 69             thermal-sensors = <&tsu 0>;
 70 
 71             trips {
 72                 sensor_crit: sensor-crit {
 73                     temperature = <125000>;
 74                     hysteresis = <1000>;
 75                     type = "critical";
 76                 };
 77             };
 78         };
 79     };

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