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Linux/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml

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  1 # SPDX-License-Identifier: GPL-2.0
  2 %YAML 1.2
  3 ---
  4 $id: http://devicetree.org/schemas/timer/samsung,exynos4210-mct.yaml#
  5 $schema: http://devicetree.org/meta-schemas/core.yaml#
  6 
  7 title: Samsung Exynos SoC Multi Core Timer (MCT)
  8 
  9 maintainers:
 10   - Krzysztof Kozlowski <krzk@kernel.org>
 11 
 12 description: |+
 13   The Samsung's Multi Core Timer (MCT) module includes two main blocks, the
 14   global timer and CPU local timers. The global timer is a 64-bit free running
 15   up-counter and can generate 4 interrupts when the counter reaches one of the
 16   four preset counter values. The CPU local timers are 32-bit free running
 17   down-counters and generate an interrupt when the counter expires. There is
 18   one CPU local timer instantiated in MCT for every CPU in the system.
 19 
 20 properties:
 21   compatible:
 22     oneOf:
 23       - enum:
 24           - samsung,exynos4210-mct
 25           - samsung,exynos4412-mct
 26       - items:
 27           - enum:
 28               - axis,artpec8-mct
 29               - google,gs101-mct
 30               - samsung,exynos3250-mct
 31               - samsung,exynos5250-mct
 32               - samsung,exynos5260-mct
 33               - samsung,exynos5420-mct
 34               - samsung,exynos5433-mct
 35               - samsung,exynos850-mct
 36               - tesla,fsd-mct
 37           - const: samsung,exynos4210-mct
 38 
 39   clocks:
 40     maxItems: 2
 41 
 42   clock-names:
 43     items:
 44       - const: fin_pll
 45       - const: mct
 46 
 47   reg:
 48     maxItems: 1
 49 
 50   samsung,frc-shared:
 51     type: boolean
 52     description: |
 53       Indicates that the hardware requires that this processor share the
 54       free-running counter with a different (main) processor.
 55 
 56   samsung,local-timers:
 57     $ref: /schemas/types.yaml#/definitions/uint32-array
 58     minItems: 1
 59     maxItems: 16
 60     description: |
 61       List of indices of local timers usable from this processor.
 62 
 63   interrupts:
 64     description: |
 65       Interrupts should be put in specific order. This is, the local timer
 66       interrupts should be specified after the four global timer interrupts
 67       have been specified:
 68       0: Global Timer Interrupt 0
 69       1: Global Timer Interrupt 1
 70       2: Global Timer Interrupt 2
 71       3: Global Timer Interrupt 3
 72       4: Local Timer Interrupt 0
 73       5: Local Timer Interrupt 1
 74       6: ..
 75       7: ..
 76       i: Local Timer Interrupt n
 77       For MCT block that uses a per-processor interrupt for local timers, such
 78       as ones compatible with "samsung,exynos4412-mct", only one local timer
 79       interrupt might be specified, meaning that all local timers use the same
 80       per processor interrupt.
 81     minItems: 5               # 4 Global + 1 local
 82     maxItems: 20              # 4 Global + 16 local
 83 
 84 required:
 85   - compatible
 86   - clock-names
 87   - clocks
 88   - interrupts
 89   - reg
 90 
 91 allOf:
 92   - if:
 93       not:
 94         properties:
 95           compatible:
 96             contains:
 97               enum:
 98                 - axis,artpec8-mct
 99     then:
100       properties:
101         samsung,local-timers: false
102         samsung,frc-shared: false
103   - if:
104       properties:
105         compatible:
106           contains:
107             const: samsung,exynos3250-mct
108     then:
109       properties:
110         interrupts:
111           minItems: 8
112           maxItems: 8
113 
114   - if:
115       properties:
116         compatible:
117           contains:
118             const: samsung,exynos5250-mct
119     then:
120       properties:
121         interrupts:
122           minItems: 6
123           maxItems: 6
124 
125   - if:
126       properties:
127         compatible:
128           contains:
129             enum:
130               - axis,artpec8-mct
131               - google,gs101-mct
132               - samsung,exynos5260-mct
133               - samsung,exynos5420-mct
134               - samsung,exynos5433-mct
135               - samsung,exynos850-mct
136     then:
137       properties:
138         interrupts:
139           minItems: 12
140           maxItems: 12
141 
142   - if:
143       properties:
144         compatible:
145           contains:
146             enum:
147               - tesla,fsd-mct
148     then:
149       properties:
150         interrupts:
151           minItems: 16
152           maxItems: 16
153 
154 additionalProperties: false
155 
156 examples:
157   - |
158     // In this example, the IP contains two local timers, using separate
159     // interrupts, so two local timer interrupts have been specified,
160     // in addition to four global timer interrupts.
161     #include <dt-bindings/clock/exynos4.h>
162     #include <dt-bindings/interrupt-controller/arm-gic.h>
163 
164     timer@10050000 {
165         compatible = "samsung,exynos4210-mct";
166         reg = <0x10050000 0x800>;
167         clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
168         clock-names = "fin_pll", "mct";
169 
170         interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
171                      <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
172                      <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
173                      <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>,
174                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
175                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
176     };
177 
178   - |
179     // In this example, the timer interrupts are connected to two separate
180     // interrupt controllers. Hence, an interrupts-extended is needed.
181     #include <dt-bindings/clock/exynos4.h>
182     #include <dt-bindings/interrupt-controller/arm-gic.h>
183 
184     timer@101c0000 {
185         compatible = "samsung,exynos4210-mct";
186         reg = <0x101C0000 0x800>;
187         clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
188         clock-names = "fin_pll", "mct";
189 
190         interrupts-extended = <&gic GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
191                               <&gic GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
192                               <&combiner 12 6>,
193                               <&combiner 12 7>,
194                               <&gic GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
195                               <&gic GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
196     };
197 
198   - |
199     // In this example, the IP contains four local timers, but using
200     // a per-processor interrupt to handle them. Only one first local
201     // interrupt is specified.
202     #include <dt-bindings/clock/exynos4.h>
203     #include <dt-bindings/interrupt-controller/arm-gic.h>
204 
205     timer@10050000 {
206         compatible = "samsung,exynos4412-mct";
207         reg = <0x10050000 0x800>;
208         clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
209         clock-names = "fin_pll", "mct";
210 
211         interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
212                      <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
213                      <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
214                      <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>,
215                      <GIC_PPI 42 IRQ_TYPE_LEVEL_HIGH>;
216     };
217 
218   - |
219     // In this example, the IP contains four local timers, but using
220     // a per-processor interrupt to handle them. All the local timer
221     // interrupts are specified.
222     #include <dt-bindings/clock/exynos4.h>
223     #include <dt-bindings/interrupt-controller/arm-gic.h>
224 
225     timer@10050000 {
226         compatible = "samsung,exynos4412-mct";
227         reg = <0x10050000 0x800>;
228         clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
229         clock-names = "fin_pll", "mct";
230 
231         interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
232                      <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
233                      <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
234                      <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>,
235                      <GIC_PPI 42 IRQ_TYPE_LEVEL_HIGH>,
236                      <GIC_PPI 42 IRQ_TYPE_LEVEL_HIGH>,
237                      <GIC_PPI 42 IRQ_TYPE_LEVEL_HIGH>,
238                      <GIC_PPI 42 IRQ_TYPE_LEVEL_HIGH>;
239     };

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