1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/ufs/sprd,ums9620-ufs.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Unisoc Universal Flash Storage (UFS) Controller
8
9 maintainers:
10 - Zhe Wang <zhe.wang1@unisoc.com>
11
12 allOf:
13 - $ref: ufs-common.yaml
14
15 properties:
16 compatible:
17 const: sprd,ums9620-ufs
18
19 reg:
20 maxItems: 1
21
22 clocks:
23 maxItems: 3
24
25 clock-names:
26 items:
27 - const: controller_eb
28 - const: cfg_eb
29 - const: core
30
31 resets:
32 maxItems: 2
33
34 reset-names:
35 items:
36 - const: controller
37 - const: device
38
39 vdd-mphy-supply:
40 description:
41 Phandle to vdd-mphy supply regulator node.
42
43 sprd,ufs-anlg-syscon:
44 $ref: /schemas/types.yaml#/definitions/phandle
45 description: phandle of syscon used to control ufs analog regs.
46
47 sprd,aon-apb-syscon:
48 $ref: /schemas/types.yaml#/definitions/phandle
49 description: phandle of syscon used to control always-on regs.
50
51 required:
52 - compatible
53 - reg
54 - clocks
55 - clock-names
56 - resets
57 - reset-names
58
59 unevaluatedProperties: false
60
61 examples:
62 - |
63 #include <dt-bindings/interrupt-controller/arm-gic.h>
64
65 ufs: ufs@22000000 {
66 compatible = "sprd,ums9620-ufs";
67 reg = <0x22000000 0x3000>;
68 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
69 vcc-supply = <&vddemmccore>;
70 vdd-mphy-supply = <&vddufs1v2>;
71 clocks = <&apahb_gate 5>, <&apahb_gate 22>, <&aonapb_clk 52>;
72 clock-names = "controller_eb", "cfg_eb", "core";
73 assigned-clocks = <&aonapb_clk 52>;
74 assigned-clock-parents = <&g5l_pll 12>;
75 resets = <&apahb_gate 4>, <&aonapb_gate 69>;
76 reset-names = "controller", "device";
77 sprd,ufs-anlg-syscon = <&anlg_phy_g12_regs>;
78 sprd,aon-apb-syscon = <&aon_apb_regs>;
79 };
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