1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (c) 2020 NXP
3 %YAML 1.2
4 ---
5 $id: http://devicetree.org/schemas/usb/fsl,imx8qm-cdns3.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
7
8 title: NXP iMX8QM Soc USB Controller
9
10 maintainers:
11 - Frank Li <Frank.Li@nxp.com>
12
13 properties:
14 compatible:
15 const: fsl,imx8qm-usb3
16
17 reg:
18 items:
19 - description: Register set for iMX USB3 Platform Control
20
21 "#address-cells":
22 enum: [ 1, 2 ]
23
24 "#size-cells":
25 enum: [ 1, 2 ]
26
27 ranges: true
28
29 clocks:
30 items:
31 - description: Standby clock. Used during ultra low power states.
32 - description: USB bus clock for usb3 controller.
33 - description: AXI clock for AXI interface.
34 - description: ipg clock for register access.
35 - description: Core clock for usb3 controller.
36
37 clock-names:
38 items:
39 - const: lpm
40 - const: bus
41 - const: aclk
42 - const: ipg
43 - const: core
44
45 power-domains:
46 maxItems: 1
47
48 # Required child node:
49
50 patternProperties:
51 "^usb@[0-9a-f]+$":
52 $ref: cdns,usb3.yaml#
53
54 required:
55 - compatible
56 - reg
57 - "#address-cells"
58 - "#size-cells"
59 - ranges
60 - clocks
61 - clock-names
62 - power-domains
63
64 additionalProperties: false
65
66 examples:
67 - |
68 #include <dt-bindings/clock/imx8-lpcg.h>
69 #include <dt-bindings/firmware/imx/rsrc.h>
70 #include <dt-bindings/interrupt-controller/arm-gic.h>
71
72 usb@5b110000 {
73 compatible = "fsl,imx8qm-usb3";
74 reg = <0x5b110000 0x10000>;
75 ranges;
76 clocks = <&usb3_lpcg IMX_LPCG_CLK_1>,
77 <&usb3_lpcg IMX_LPCG_CLK_0>,
78 <&usb3_lpcg IMX_LPCG_CLK_7>,
79 <&usb3_lpcg IMX_LPCG_CLK_4>,
80 <&usb3_lpcg IMX_LPCG_CLK_5>;
81 clock-names = "lpm", "bus", "aclk", "ipg", "core";
82 assigned-clocks = <&clk IMX_SC_R_USB_2 IMX_SC_PM_CLK_MST_BUS>;
83 assigned-clock-rates = <250000000>;
84 power-domains = <&pd IMX_SC_R_USB_2>;
85 #address-cells = <1>;
86 #size-cells = <1>;
87
88 usb@5b120000 {
89 compatible = "cdns,usb3";
90 reg = <0x5b120000 0x10000>, /* memory area for OTG/DRD registers */
91 <0x5b130000 0x10000>, /* memory area for HOST registers */
92 <0x5b140000 0x10000>; /* memory area for DEVICE registers */
93 reg-names = "otg", "xhci", "dev";
94 interrupt-parent = <&gic>;
95 interrupts = <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>,
96 <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>,
97 <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>,
98 <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>;
99 interrupt-names = "host", "peripheral", "otg", "wakeup";
100 phys = <&usb3_phy>;
101 phy-names = "cdns3,usb3-phy";
102 };
103 };
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