1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/usb/nvidia,tegra210-xusb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: NVIDIA Tegra210 xHCI controller
8
9 maintainers:
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12
13 description: The Tegra xHCI controller supports both USB2 and USB3 interfaces
14 exposed by the Tegra XUSB pad controller.
15
16 properties:
17 compatible:
18 const: nvidia,tegra210-xusb
19
20 reg:
21 items:
22 - description: base and length of the xHCI host registers
23 - description: base and length of the XUSB FPCI registers
24 - description: base and length of the XUSB IPFS registers
25
26 reg-names:
27 items:
28 - const: hcd
29 - const: fpci
30 - const: ipfs
31
32 interrupts:
33 items:
34 - description: xHCI host interrupt
35 - description: mailbox interrupt
36
37 clocks:
38 items:
39 - description: XUSB host clock
40 - description: XUSB host source clock
41 - description: XUSB Falcon source clock
42 - description: XUSB SuperSpeed clock
43 - description: XUSB SuperSpeed clock divider
44 - description: XUSB SuperSpeed source clock
45 - description: XUSB HighSpeed clock source
46 - description: XUSB FullSpeed clock source
47 - description: USB PLL
48 - description: reference clock
49 - description: I/O PLL
50
51 clock-names:
52 items:
53 - const: xusb_host
54 - const: xusb_host_src
55 - const: xusb_falcon_src
56 - const: xusb_ss
57 - const: xusb_ss_div2
58 - const: xusb_ss_src
59 - const: xusb_hs_src
60 - const: xusb_fs_src
61 - const: pll_u_480m
62 - const: clk_m
63 - const: pll_e
64
65 resets:
66 items:
67 - description: reset for the XUSB host controller
68 - description: reset for the SuperSpeed logic
69 - description: shared reset for xusb_{ss,hs,fs,falcon,host}_src.
70
71 reset-names:
72 items:
73 - const: xusb_host
74 - const: xusb_ss
75 - const: xusb_src
76
77 nvidia,xusb-padctl:
78 $ref: /schemas/types.yaml#/definitions/phandle
79 description: phandle to the XUSB pad controller that is used to configure
80 the USB pads used by the XHCI controller
81
82 phys:
83 minItems: 1
84 maxItems: 9
85
86 phy-names:
87 minItems: 1
88 maxItems: 9
89 items:
90 enum:
91 - usb2-0
92 - usb2-1
93 - usb2-2
94 - usb2-3
95 - hsic-0
96 - usb3-0
97 - usb3-1
98 - usb3-2
99 - usb3-3
100
101 power-domains:
102 items:
103 - description: XUSBC power domain (for Host and USB 2.0)
104 - description: XUSBA power domain (for SuperSpeed)
105
106 power-domain-names:
107 items:
108 - const: xusb_host
109 - const: xusb_ss
110
111 dvddio-pex-supply:
112 description: PCIe/USB3 analog logic power supply. Must supply 1.05 V.
113
114 hvddio-pex-supply:
115 description: High-voltage PCIe/USB3 power supply. Must supply 1.8 V.
116
117 avdd-usb-supply:
118 description: USB controller power supply. Must supply 3.3 V.
119
120 avdd-pll-utmip-supply:
121 description: UTMI PLL power supply. Must supply 1.8 V.
122
123 avdd-pll-uerefe-supply:
124 description: PLLE reference PLL power supply. Must supply 1.05 V.
125
126 dvdd-usb-ss-pll-supply:
127 description: PCIe/USB3 PLL power supply. Must supply 1.05 V.
128
129 hvdd-usb-ss-pll-e-supply:
130 description: High-voltage PLLE power supply. Must supply 1.8 V.
131
132 allOf:
133 - $ref: usb-xhci.yaml
134
135 unevaluatedProperties: false
136
137 examples:
138 - |
139 #include <dt-bindings/clock/tegra210-car.h>
140 #include <dt-bindings/interrupt-controller/arm-gic.h>
141
142 usb@70090000 {
143 compatible = "nvidia,tegra210-xusb";
144 reg = <0x70090000 0x8000>,
145 <0x70098000 0x1000>,
146 <0x70099000 0x1000>;
147 reg-names = "hcd", "fpci", "ipfs";
148
149 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
150 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
151
152 clocks = <&tegra_car TEGRA210_CLK_XUSB_HOST>,
153 <&tegra_car TEGRA210_CLK_XUSB_HOST_SRC>,
154 <&tegra_car TEGRA210_CLK_XUSB_FALCON_SRC>,
155 <&tegra_car TEGRA210_CLK_XUSB_SS>,
156 <&tegra_car TEGRA210_CLK_XUSB_SS_DIV2>,
157 <&tegra_car TEGRA210_CLK_XUSB_SS_SRC>,
158 <&tegra_car TEGRA210_CLK_XUSB_HS_SRC>,
159 <&tegra_car TEGRA210_CLK_XUSB_FS_SRC>,
160 <&tegra_car TEGRA210_CLK_PLL_U_480M>,
161 <&tegra_car TEGRA210_CLK_CLK_M>,
162 <&tegra_car TEGRA210_CLK_PLL_E>;
163 clock-names = "xusb_host", "xusb_host_src",
164 "xusb_falcon_src", "xusb_ss",
165 "xusb_ss_div2", "xusb_ss_src",
166 "xusb_hs_src", "xusb_fs_src",
167 "pll_u_480m", "clk_m", "pll_e";
168 resets = <&tegra_car 89>, <&tegra_car 156>,
169 <&tegra_car 143>;
170 reset-names = "xusb_host", "xusb_ss", "xusb_src";
171 power-domains = <&pd_xusbhost>, <&pd_xusbss>;
172 power-domain-names = "xusb_host", "xusb_ss";
173
174 nvidia,xusb-padctl = <&padctl>;
175
176 phys = <&phy_usb2_0>, <&phy_usb2_1>, <&phy_usb2_2>, <&phy_usb2_3>,
177 <&phy_pcie_6>, <&phy_pcie_5>;
178 phy-names = "usb2-0", "usb2-1", "usb2-2", "usb2-3", "usb3-0",
179 "usb3-1";
180 dvddio-pex-supply = <&vdd_pex_1v05>;
181 hvddio-pex-supply = <&vdd_1v8>;
182 avdd-usb-supply = <&vdd_3v3_sys>;
183 avdd-pll-utmip-supply = <&vdd_1v8>;
184 avdd-pll-uerefe-supply = <&vdd_pex_1v05>;
185 dvdd-usb-ss-pll-supply = <&vdd_pex_1v05>;
186 hvdd-usb-ss-pll-e-supply = <&vdd_1v8>;
187
188 #address-cells = <1>;
189 #size-cells = <0>;
190
191 ethernet@1 {
192 compatible = "usb955,9ff";
193 reg = <1>;
194 };
195 };
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