1 # SPDX-License-Identifier: GPL-2.0
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/usb/rockchip,dwc3.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Rockchip SuperSpeed DWC3 USB SoC controller
8
9 maintainers:
10 - Heiko Stuebner <heiko@sntech.de>
11
12 description:
13 The common content of the node is defined in snps,dwc3.yaml.
14
15 Phy documentation is provided in the following places.
16
17 USB2.0 PHY
18 Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml
19
20 Type-C PHY
21 Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt
22
23 select:
24 properties:
25 compatible:
26 contains:
27 enum:
28 - rockchip,rk3328-dwc3
29 - rockchip,rk3568-dwc3
30 - rockchip,rk3588-dwc3
31 required:
32 - compatible
33
34 properties:
35 compatible:
36 items:
37 - enum:
38 - rockchip,rk3328-dwc3
39 - rockchip,rk3568-dwc3
40 - rockchip,rk3588-dwc3
41 - const: snps,dwc3
42
43 reg:
44 maxItems: 1
45
46 interrupts:
47 maxItems: 1
48
49 clocks:
50 minItems: 3
51 items:
52 - description:
53 Controller reference clock, must to be 24 MHz
54 - description:
55 Controller suspend clock, must to be 24 MHz or 32 KHz
56 - description:
57 Master/Core clock, must to be >= 62.5 MHz for SS
58 operation and >= 30MHz for HS operation
59 - description:
60 Controller grf clock OR UTMI clock
61 - description:
62 PIPE clock
63
64 clock-names:
65 minItems: 3
66 items:
67 - const: ref_clk
68 - const: suspend_clk
69 - const: bus_clk
70 - enum:
71 - grf_clk
72 - utmi
73 - const: pipe
74
75 power-domains:
76 maxItems: 1
77
78 resets:
79 maxItems: 1
80
81 reset-names:
82 const: usb3-otg
83
84 unevaluatedProperties: false
85
86 required:
87 - compatible
88 - reg
89 - interrupts
90 - clocks
91 - clock-names
92
93 allOf:
94 - $ref: snps,dwc3.yaml#
95 - if:
96 properties:
97 compatible:
98 contains:
99 const: rockchip,rk3328-dwc3
100 then:
101 properties:
102 clocks:
103 minItems: 3
104 maxItems: 4
105 clock-names:
106 minItems: 3
107 items:
108 - const: ref_clk
109 - const: suspend_clk
110 - const: bus_clk
111 - const: grf_clk
112 - if:
113 properties:
114 compatible:
115 contains:
116 const: rockchip,rk3568-dwc3
117 then:
118 properties:
119 clocks:
120 maxItems: 3
121 clock-names:
122 maxItems: 3
123 - if:
124 properties:
125 compatible:
126 contains:
127 const: rockchip,rk3588-dwc3
128 then:
129 properties:
130 clock-names:
131 minItems: 3
132 items:
133 - const: ref_clk
134 - const: suspend_clk
135 - const: bus_clk
136 - const: utmi
137 - const: pipe
138
139 examples:
140 - |
141 #include <dt-bindings/clock/rk3328-cru.h>
142 #include <dt-bindings/interrupt-controller/arm-gic.h>
143
144 bus {
145 #address-cells = <2>;
146 #size-cells = <2>;
147
148 usbdrd3_0: usb@fe800000 {
149 compatible = "rockchip,rk3328-dwc3", "snps,dwc3";
150 reg = <0x0 0xfe800000 0x0 0x100000>;
151 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
152 clocks = <&cru SCLK_USB3OTG_REF>, <&cru SCLK_USB3OTG_SUSPEND>,
153 <&cru ACLK_USB3OTG>;
154 clock-names = "ref_clk", "suspend_clk",
155 "bus_clk", "grf_clk";
156 dr_mode = "otg";
157 };
158 };
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