1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/watchdog/atmel,sama5d4-wdt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Atmel SAMA5D4 Watchdog Timer (WDT) Controller
8
9 maintainers:
10 - Eugen Hristev <eugen.hristev@microchip.com>
11
12 allOf:
13 - $ref: watchdog.yaml#
14
15 properties:
16 compatible:
17 oneOf:
18 - enum:
19 - atmel,sama5d4-wdt
20 - microchip,sam9x60-wdt
21 - microchip,sama7g5-wdt
22 - items:
23 - const: microchip,sam9x7-wdt
24 - const: microchip,sam9x60-wdt
25
26 reg:
27 maxItems: 1
28
29 interrupts:
30 maxItems: 1
31
32 atmel,watchdog-type:
33 $ref: /schemas/types.yaml#/definitions/string
34 description: should be hardware or software.
35 oneOf:
36 - description:
37 Enable watchdog fault reset. A watchdog fault triggers
38 watchdog reset.
39 const: hardware
40 - description:
41 Enable watchdog fault interrupt. A watchdog fault asserts
42 watchdog interrupt.
43 const: software
44 default: hardware
45
46 atmel,idle-halt:
47 $ref: /schemas/types.yaml#/definitions/flag
48 description: |
49 present if you want to stop the watchdog when the CPU is in idle state.
50 CAUTION: This property should be used with care, it actually makes the
51 watchdog not counting when the CPU is in idle state, therefore the
52 watchdog reset time depends on mean CPU usage and will not reset at all
53 if the CPU stop working while it is in idle state, which is probably
54 not what you want.
55
56 atmel,dbg-halt:
57 $ref: /schemas/types.yaml#/definitions/flag
58 description: |
59 present if you want to stop the watchdog when the CPU is in debug state.
60
61 required:
62 - compatible
63 - reg
64
65 unevaluatedProperties: false
66
67 examples:
68 - |
69 #include <dt-bindings/interrupt-controller/irq.h>
70
71 watchdog@fc068640 {
72 compatible = "atmel,sama5d4-wdt";
73 reg = <0xfc068640 0x10>;
74 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 5>;
75 timeout-sec = <10>;
76 atmel,watchdog-type = "hardware";
77 atmel,dbg-halt;
78 atmel,idle-halt;
79 };
80
81 ...
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