1 .. SPDX-License-Identifier: GPL-2.0-only 2 3 Kernel drivers ltc4282 4 ========================================== 5 6 Supported chips: 7 8 * Analog Devices LTC4282 9 10 Prefix: 'ltc4282' 11 12 Addresses scanned: - I2C 0x40 - 0x5A (7-bit) 13 Addresses scanned: - I2C 0x80 - 0xB4 with a step of 2 (8-bit) 14 15 Datasheet: 16 17 https://www.analog.com/media/en/technical-documentation/data-sheets/ltc4282.pdf 18 19 Author: Nuno Sá <nuno.sa@analog.com> 20 21 Description 22 ___________ 23 24 The LTC4282 hot swap controller allows a board to be safely inserted and removed 25 from a live backplane. Using one or more external N-channel pass transistors, 26 board supply voltage and inrush current are ramped up at an adjustable rate. An 27 I2C interface and onboard ADC allows for monitoring of board current, voltage, 28 power, energy and fault status. The device features analog foldback current 29 limiting and supply monitoring for applications from 2.9V to 33V. Dual 12V gate 30 drive allows high power applications to either share safe operating area across 31 parallel MOSFETs or support a 2-stage start-up that first charges the load 32 capacitance followed by enabling a low on-resistance path to the load. The 33 LTC4282 is well suited to high power applications because the precise monitoring 34 capability and accurate current limiting reduce the extremes in which both loads 35 and power supplies must safely operate. Non-volatile configuration allows for 36 flexibility in the autonomous generation of alerts and response to faults. 37 38 Sysfs entries 39 _____________ 40 41 The following attributes are supported. Limits are read-write and all the other 42 attributes are read-only. Note that in0 and in1 are mutually exclusive. Enabling 43 one disables the other and disabling one enables the other. 44 45 ======================= ========================================== 46 in0_input Output voltage (mV). 47 in0_min Undervoltage threshold 48 in0_max Overvoltage threshold 49 in0_lowest Lowest measured voltage 50 in0_highest Highest measured voltage 51 in0_reset_history Write 1 to reset in0 history. 52 Also clears fet bad and short fault logs. 53 in0_min_alarm Undervoltage alarm 54 in0_max_alarm Overvoltage alarm 55 in0_enable Enable/Disable VSOURCE monitoring 56 in0_fault Failure in the MOSFETs. Either bad or shorted FET. 57 in0_label Channel label (VSOURCE) 58 59 in1_input Input voltage (mV). 60 in1_min Undervoltage threshold 61 in1_max Overvoltage threshold 62 in1_lowest Lowest measured voltage 63 in1_highest Highest measured voltage 64 in1_reset_history Write 1 to reset in1 history. 65 Also clears over/undervoltage fault logs. 66 in1_min_alarm Undervoltage alarm 67 in1_max_alarm Overvoltage alarm 68 in1_lcrit_alarm Critical Undervoltage alarm 69 in1_crit_alarm Critical Overvoltage alarm 70 in1_enable Enable/Disable VDD monitoring 71 in1_label Channel label (VDD) 72 73 in2_input GPIO voltage (mV) 74 in2_min Undervoltage threshold 75 in2_max Overvoltage threshold 76 in2_lowest Lowest measured voltage 77 in2_highest Highest measured voltage 78 in2_reset_history Write 1 to reset in2 history 79 in2_min_alarm Undervoltage alarm 80 in2_max_alarm Overvoltage alarm 81 in2_label Channel label (VGPIO) 82 83 curr1_input Sense current (mA) 84 curr1_min Undercurrent threshold 85 curr1_max Overcurrent threshold 86 curr1_lowest Lowest measured current 87 curr1_highest Highest measured current 88 curr1_reset_history Write 1 to reset curr1 history. 89 Also clears overcurrent fault logs. 90 curr1_min_alarm Undercurrent alarm 91 curr1_max_alarm Overcurrent alarm 92 curr1_crit_alarm Critical Overcurrent alarm 93 curr1_label Channel label (ISENSE) 94 95 power1_input Power (in uW) 96 power1_min Low power threshold 97 power1_max High power threshold 98 power1_input_lowest Historical minimum power use 99 power1_input_highest Historical maximum power use 100 power1_reset_history Write 1 to reset power1 history. 101 Also clears power bad fault logs. 102 power1_min_alarm Low power alarm 103 power1_max_alarm High power alarm 104 power1_label Channel label (Power) 105 106 energy1_input Measured energy over time (in microJoule) 107 energy1_enable Enable/Disable Energy accumulation 108 ======================= ========================================== 109 110 DebugFs entries 111 _______________ 112 113 The chip also has a fault log register where failures can be logged. Hence, 114 as these are logging events, we give access to them in debugfs. Note that 115 even if some failure is detected in these logs, it does necessarily mean 116 that the failure is still present. As mentioned in the proper Sysfs entries, 117 these logs can be cleared by writing in the proper reset_history attribute. 118 119 .. warning:: The debugfs interface is subject to change without notice 120 and is only available when the kernel is compiled with 121 ``CONFIG_DEBUG_FS`` defined. 122 123 ``/sys/kernel/debug/ltc4282-hwmon[X]/`` 124 contains the following attributes: 125 126 ======================= ========================================== 127 power1_bad_fault_log Set to 1 by a power1 bad fault occurring. 128 in0_fet_short_fault_log Set to 1 when the ADC detects a FET-short fault. 129 in0_fet_bad_fault_log Set to 1 when a FET-BAD fault occurs. 130 in1_crit_fault_log Set to 1 by a VDD overvoltage fault occurring. 131 in1_lcrit_fault_log Set to 1 by a VDD undervoltage fault occurring. 132 curr1_crit_fault_log Set to 1 by an overcurrent fault occurring. 133 ======================= ==========================================
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