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Linux/Documentation/hwmon/tps40422.rst

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  1 Kernel driver tps40422
  2 ======================
  3 
  4 Supported chips:
  5 
  6   * TI TPS40422
  7 
  8     Prefix: 'tps40422'
  9 
 10     Addresses scanned: -
 11 
 12     Datasheet: https://www.ti.com/lit/gpn/tps40422
 13 
 14 Author: Zhu Laiwen <richard.zhu@nsn.com>
 15 
 16 
 17 Description
 18 -----------
 19 
 20 This driver supports TI TPS40422 Dual-Output or Two-Phase Synchronous Buck
 21 Controller with PMBus
 22 
 23 The driver is a client driver to the core PMBus driver.
 24 Please see Documentation/hwmon/pmbus.rst for details on PMBus client drivers.
 25 
 26 
 27 Usage Notes
 28 -----------
 29 
 30 This driver does not auto-detect devices. You will have to instantiate the
 31 devices explicitly. Please see Documentation/i2c/instantiating-devices.rst for
 32 details.
 33 
 34 
 35 Platform data support
 36 ---------------------
 37 
 38 The driver supports standard PMBus driver platform data.
 39 
 40 
 41 Sysfs entries
 42 -------------
 43 
 44 The following attributes are supported.
 45 
 46 ======================= =======================================================
 47 in[1-2]_label           "vout[1-2]"
 48 in[1-2]_input           Measured voltage. From READ_VOUT register.
 49 in[1-2]_alarm           voltage alarm.
 50 
 51 curr[1-2]_input         Measured current. From READ_IOUT register.
 52 curr[1-2]_label         "iout[1-2]"
 53 curr1_max               Maximum current. From IOUT_OC_WARN_LIMIT register.
 54 curr1_crit              Critical maximum current. From IOUT_OC_FAULT_LIMIT
 55                         register.
 56 curr1_max_alarm         Current high alarm. From IOUT_OC_WARN_LIMIT status.
 57 curr1_crit_alarm        Current critical high alarm. From IOUT_OC_FAULT status.
 58 curr2_alarm             Current high alarm. From IOUT_OC_WARNING status.
 59 
 60 temp1_input             Measured temperature. From READ_TEMPERATURE_2 register
 61                         on page 0.
 62 temp1_max               Maximum temperature. From OT_WARN_LIMIT register.
 63 temp1_crit              Critical high temperature. From OT_FAULT_LIMIT register.
 64 temp1_max_alarm         Chip temperature high alarm. Set by comparing
 65                         READ_TEMPERATURE_2 on page 0 with OT_WARN_LIMIT if
 66                         TEMP_OT_WARNING status is set.
 67 temp1_crit_alarm        Chip temperature critical high alarm. Set by comparing
 68                         READ_TEMPERATURE_2 on page 0 with OT_FAULT_LIMIT if
 69                         TEMP_OT_FAULT status is set.
 70 temp2_input             Measured temperature. From READ_TEMPERATURE_2 register
 71                         on page 1.
 72 temp2_alarm             Chip temperature alarm on page 1.
 73 ======================= =======================================================

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