1 ====================== 2 Linux Kernel Makefiles 3 ====================== 4 5 This document describes the Linux kernel Makefiles. 6 7 Overview 8 ======== 9 10 The Makefiles have five parts:: 11 12 Makefile the top Makefile. 13 .config the kernel configuration file. 14 arch/$(SRCARCH)/Makefile the arch Makefile. 15 scripts/Makefile.* common rules etc. for all kbuild Makefiles. 16 kbuild Makefiles exist in every subdirectory 17 18 The top Makefile reads the .config file, which comes from the kernel 19 configuration process. 20 21 The top Makefile is responsible for building two major products: vmlinux 22 (the resident kernel image) and modules (any module files). 23 It builds these goals by recursively descending into the subdirectories of 24 the kernel source tree. 25 26 The list of subdirectories which are visited depends upon the kernel 27 configuration. The top Makefile textually includes an arch Makefile 28 with the name arch/$(SRCARCH)/Makefile. The arch Makefile supplies 29 architecture-specific information to the top Makefile. 30 31 Each subdirectory has a kbuild Makefile which carries out the commands 32 passed down from above. The kbuild Makefile uses information from the 33 .config file to construct various file lists used by kbuild to build 34 any built-in or modular targets. 35 36 scripts/Makefile.* contains all the definitions/rules etc. that 37 are used to build the kernel based on the kbuild makefiles. 38 39 Who does what 40 ============= 41 42 People have four different relationships with the kernel Makefiles. 43 44 *Users* are people who build kernels. These people type commands such as 45 ``make menuconfig`` or ``make``. They usually do not read or edit 46 any kernel Makefiles (or any other source files). 47 48 *Normal developers* are people who work on features such as device 49 drivers, file systems, and network protocols. These people need to 50 maintain the kbuild Makefiles for the subsystem they are 51 working on. In order to do this effectively, they need some overall 52 knowledge about the kernel Makefiles, plus detailed knowledge about the 53 public interface for kbuild. 54 55 *Arch developers* are people who work on an entire architecture, such 56 as sparc or x86. Arch developers need to know about the arch Makefile 57 as well as kbuild Makefiles. 58 59 *Kbuild developers* are people who work on the kernel build system itself. 60 These people need to know about all aspects of the kernel Makefiles. 61 62 This document is aimed towards normal developers and arch developers. 63 64 65 The kbuild files 66 ================ 67 68 Most Makefiles within the kernel are kbuild Makefiles that use the 69 kbuild infrastructure. This chapter introduces the syntax used in the 70 kbuild makefiles. 71 72 The preferred name for the kbuild files are ``Makefile`` but ``Kbuild`` can 73 be used and if both a ``Makefile`` and a ``Kbuild`` file exists, then the ``Kbuild`` 74 file will be used. 75 76 Section `Goal definitions`_ is a quick intro; further chapters provide 77 more details, with real examples. 78 79 Goal definitions 80 ---------------- 81 82 Goal definitions are the main part (heart) of the kbuild Makefile. 83 These lines define the files to be built, any special compilation 84 options, and any subdirectories to be entered recursively. 85 86 The most simple kbuild makefile contains one line: 87 88 Example:: 89 90 obj-y += foo.o 91 92 This tells kbuild that there is one object in that directory, named 93 foo.o. foo.o will be built from foo.c or foo.S. 94 95 If foo.o shall be built as a module, the variable obj-m is used. 96 Therefore the following pattern is often used: 97 98 Example:: 99 100 obj-$(CONFIG_FOO) += foo.o 101 102 $(CONFIG_FOO) evaluates to either y (for built-in) or m (for module). 103 If CONFIG_FOO is neither y nor m, then the file will not be compiled 104 nor linked. 105 106 Built-in object goals - obj-y 107 ----------------------------- 108 109 The kbuild Makefile specifies object files for vmlinux 110 in the $(obj-y) lists. These lists depend on the kernel 111 configuration. 112 113 Kbuild compiles all the $(obj-y) files. It then calls 114 ``$(AR) rcSTP`` to merge these files into one built-in.a file. 115 This is a thin archive without a symbol table. It will be later 116 linked into vmlinux by scripts/link-vmlinux.sh 117 118 The order of files in $(obj-y) is significant. Duplicates in 119 the lists are allowed: the first instance will be linked into 120 built-in.a and succeeding instances will be ignored. 121 122 Link order is significant, because certain functions 123 (module_init() / __initcall) will be called during boot in the 124 order they appear. So keep in mind that changing the link 125 order may e.g. change the order in which your SCSI 126 controllers are detected, and thus your disks are renumbered. 127 128 Example:: 129 130 #drivers/isdn/i4l/Makefile 131 # Makefile for the kernel ISDN subsystem and device drivers. 132 # Each configuration option enables a list of files. 133 obj-$(CONFIG_ISDN_I4L) += isdn.o 134 obj-$(CONFIG_ISDN_PPP_BSDCOMP) += isdn_bsdcomp.o 135 136 Loadable module goals - obj-m 137 ----------------------------- 138 139 $(obj-m) specifies object files which are built as loadable 140 kernel modules. 141 142 A module may be built from one source file or several source 143 files. In the case of one source file, the kbuild makefile 144 simply adds the file to $(obj-m). 145 146 Example:: 147 148 #drivers/isdn/i4l/Makefile 149 obj-$(CONFIG_ISDN_PPP_BSDCOMP) += isdn_bsdcomp.o 150 151 Note: In this example $(CONFIG_ISDN_PPP_BSDCOMP) evaluates to "m" 152 153 If a kernel module is built from several source files, you specify 154 that you want to build a module in the same way as above; however, 155 kbuild needs to know which object files you want to build your 156 module from, so you have to tell it by setting a $(<module_name>-y) 157 variable. 158 159 Example:: 160 161 #drivers/isdn/i4l/Makefile 162 obj-$(CONFIG_ISDN_I4L) += isdn.o 163 isdn-y := isdn_net_lib.o isdn_v110.o isdn_common.o 164 165 In this example, the module name will be isdn.o. Kbuild will 166 compile the objects listed in $(isdn-y) and then run 167 ``$(LD) -r`` on the list of these files to generate isdn.o. 168 169 Due to kbuild recognizing $(<module_name>-y) for composite objects, 170 you can use the value of a ``CONFIG_`` symbol to optionally include an 171 object file as part of a composite object. 172 173 Example:: 174 175 #fs/ext2/Makefile 176 obj-$(CONFIG_EXT2_FS) += ext2.o 177 ext2-y := balloc.o dir.o file.o ialloc.o inode.o ioctl.o \ 178 namei.o super.o symlink.o 179 ext2-$(CONFIG_EXT2_FS_XATTR) += xattr.o xattr_user.o \ 180 xattr_trusted.o 181 182 In this example, xattr.o, xattr_user.o and xattr_trusted.o are only 183 part of the composite object ext2.o if $(CONFIG_EXT2_FS_XATTR) 184 evaluates to "y". 185 186 Note: Of course, when you are building objects into the kernel, 187 the syntax above will also work. So, if you have CONFIG_EXT2_FS=y, 188 kbuild will build an ext2.o file for you out of the individual 189 parts and then link this into built-in.a, as you would expect. 190 191 Library file goals - lib-y 192 -------------------------- 193 194 Objects listed with obj-* are used for modules, or 195 combined in a built-in.a for that specific directory. 196 There is also the possibility to list objects that will 197 be included in a library, lib.a. 198 All objects listed with lib-y are combined in a single 199 library for that directory. 200 Objects that are listed in obj-y and additionally listed in 201 lib-y will not be included in the library, since they will 202 be accessible anyway. 203 For consistency, objects listed in lib-m will be included in lib.a. 204 205 Note that the same kbuild makefile may list files to be built-in 206 and to be part of a library. Therefore the same directory 207 may contain both a built-in.a and a lib.a file. 208 209 Example:: 210 211 #arch/x86/lib/Makefile 212 lib-y := delay.o 213 214 This will create a library lib.a based on delay.o. For kbuild to 215 actually recognize that there is a lib.a being built, the directory 216 shall be listed in libs-y. 217 218 See also `List directories to visit when descending`_. 219 220 Use of lib-y is normally restricted to ``lib/`` and ``arch/*/lib``. 221 222 Descending down in directories 223 ------------------------------ 224 225 A Makefile is only responsible for building objects in its own 226 directory. Files in subdirectories should be taken care of by 227 Makefiles in these subdirs. The build system will automatically 228 invoke make recursively in subdirectories, provided you let it know of 229 them. 230 231 To do so, obj-y and obj-m are used. 232 ext2 lives in a separate directory, and the Makefile present in fs/ 233 tells kbuild to descend down using the following assignment. 234 235 Example:: 236 237 #fs/Makefile 238 obj-$(CONFIG_EXT2_FS) += ext2/ 239 240 If CONFIG_EXT2_FS is set to either "y" (built-in) or "m" (modular) 241 the corresponding obj- variable will be set, and kbuild will descend 242 down in the ext2 directory. 243 244 Kbuild uses this information not only to decide that it needs to visit 245 the directory, but also to decide whether or not to link objects from 246 the directory into vmlinux. 247 248 When Kbuild descends into the directory with "y", all built-in objects 249 from that directory are combined into the built-in.a, which will be 250 eventually linked into vmlinux. 251 252 When Kbuild descends into the directory with "m", in contrast, nothing 253 from that directory will be linked into vmlinux. If the Makefile in 254 that directory specifies obj-y, those objects will be left orphan. 255 It is very likely a bug of the Makefile or of dependencies in Kconfig. 256 257 Kbuild also supports dedicated syntax, subdir-y and subdir-m, for 258 descending into subdirectories. It is a good fit when you know they 259 do not contain kernel-space objects at all. A typical usage is to let 260 Kbuild descend into subdirectories to build tools. 261 262 Examples:: 263 264 # scripts/Makefile 265 subdir-$(CONFIG_GCC_PLUGINS) += gcc-plugins 266 subdir-$(CONFIG_MODVERSIONS) += genksyms 267 subdir-$(CONFIG_SECURITY_SELINUX) += selinux 268 269 Unlike obj-y/m, subdir-y/m does not need the trailing slash since this 270 syntax is always used for directories. 271 272 It is good practice to use a ``CONFIG_`` variable when assigning directory 273 names. This allows kbuild to totally skip the directory if the 274 corresponding ``CONFIG_`` option is neither "y" nor "m". 275 276 Non-builtin vmlinux targets - extra-y 277 ------------------------------------- 278 279 extra-y specifies targets which are needed for building vmlinux, 280 but not combined into built-in.a. 281 282 Examples are: 283 284 1) vmlinux linker script 285 286 The linker script for vmlinux is located at 287 arch/$(SRCARCH)/kernel/vmlinux.lds 288 289 Example:: 290 291 # arch/x86/kernel/Makefile 292 extra-y += vmlinux.lds 293 294 $(extra-y) should only contain targets needed for vmlinux. 295 296 Kbuild skips extra-y when vmlinux is apparently not a final goal. 297 (e.g. ``make modules``, or building external modules) 298 299 If you intend to build targets unconditionally, always-y (explained 300 in the next section) is the correct syntax to use. 301 302 Always built goals - always-y 303 ----------------------------- 304 305 always-y specifies targets which are literally always built when 306 Kbuild visits the Makefile. 307 308 Example:: 309 310 # ./Kbuild 311 offsets-file := include/generated/asm-offsets.h 312 always-y += $(offsets-file) 313 314 Compilation flags 315 ----------------- 316 317 ccflags-y, asflags-y and ldflags-y 318 These three flags apply only to the kbuild makefile in which they 319 are assigned. They are used for all the normal cc, as and ld 320 invocations happening during a recursive build. 321 Note: Flags with the same behaviour were previously named: 322 EXTRA_CFLAGS, EXTRA_AFLAGS and EXTRA_LDFLAGS. 323 They are still supported but their usage is deprecated. 324 325 ccflags-y specifies options for compiling with $(CC). 326 327 Example:: 328 329 # drivers/acpi/acpica/Makefile 330 ccflags-y := -Os -D_LINUX -DBUILDING_ACPICA 331 ccflags-$(CONFIG_ACPI_DEBUG) += -DACPI_DEBUG_OUTPUT 332 333 This variable is necessary because the top Makefile owns the 334 variable $(KBUILD_CFLAGS) and uses it for compilation flags for the 335 entire tree. 336 337 asflags-y specifies assembler options. 338 339 Example:: 340 341 #arch/sparc/kernel/Makefile 342 asflags-y := -ansi 343 344 ldflags-y specifies options for linking with $(LD). 345 346 Example:: 347 348 #arch/cris/boot/compressed/Makefile 349 ldflags-y += -T $(src)/decompress_$(arch-y).lds 350 351 subdir-ccflags-y, subdir-asflags-y 352 The two flags listed above are similar to ccflags-y and asflags-y. 353 The difference is that the subdir- variants have effect for the kbuild 354 file where they are present and all subdirectories. 355 Options specified using subdir-* are added to the commandline before 356 the options specified using the non-subdir variants. 357 358 Example:: 359 360 subdir-ccflags-y := -Werror 361 362 ccflags-remove-y, asflags-remove-y 363 These flags are used to remove particular flags for the compiler, 364 assembler invocations. 365 366 Example:: 367 368 ccflags-remove-$(CONFIG_MCOUNT) += -pg 369 370 CFLAGS_$@, AFLAGS_$@ 371 CFLAGS_$@ and AFLAGS_$@ only apply to commands in current 372 kbuild makefile. 373 374 $(CFLAGS_$@) specifies per-file options for $(CC). The $@ 375 part has a literal value which specifies the file that it is for. 376 377 CFLAGS_$@ has the higher priority than ccflags-remove-y; CFLAGS_$@ 378 can re-add compiler flags that were removed by ccflags-remove-y. 379 380 Example:: 381 382 # drivers/scsi/Makefile 383 CFLAGS_aha152x.o = -DAHA152X_STAT -DAUTOCONF 384 385 This line specify compilation flags for aha152x.o. 386 387 $(AFLAGS_$@) is a similar feature for source files in assembly 388 languages. 389 390 AFLAGS_$@ has the higher priority than asflags-remove-y; AFLAGS_$@ 391 can re-add assembler flags that were removed by asflags-remove-y. 392 393 Example:: 394 395 # arch/arm/kernel/Makefile 396 AFLAGS_head.o := -DTEXT_OFFSET=$(TEXT_OFFSET) 397 AFLAGS_crunch-bits.o := -Wa,-mcpu=ep9312 398 AFLAGS_iwmmxt.o := -Wa,-mcpu=iwmmxt 399 400 Dependency tracking 401 ------------------- 402 403 Kbuild tracks dependencies on the following: 404 405 1) All prerequisite files (both ``*.c`` and ``*.h``) 406 2) ``CONFIG_`` options used in all prerequisite files 407 3) Command-line used to compile target 408 409 Thus, if you change an option to $(CC) all affected files will 410 be re-compiled. 411 412 Custom Rules 413 ------------ 414 415 Custom rules are used when the kbuild infrastructure does 416 not provide the required support. A typical example is 417 header files generated during the build process. 418 Another example are the architecture-specific Makefiles which 419 need custom rules to prepare boot images etc. 420 421 Custom rules are written as normal Make rules. 422 Kbuild is not executing in the directory where the Makefile is 423 located, so all custom rules shall use a relative 424 path to prerequisite files and target files. 425 426 Two variables are used when defining custom rules: 427 428 $(src) 429 $(src) is the directory where the Makefile is located. Always use $(src) when 430 referring to files located in the src tree. 431 432 $(obj) 433 $(obj) is the directory where the target is saved. Always use $(obj) when 434 referring to generated files. Use $(obj) for pattern rules that need to work 435 for both generated files and real sources (VPATH will help to find the 436 prerequisites not only in the object tree but also in the source tree). 437 438 Example:: 439 440 #drivers/scsi/Makefile 441 $(obj)/53c8xx_d.h: $(src)/53c7,8xx.scr $(src)/script_asm.pl 442 $(CPP) -DCHIP=810 - < $< | ... $(src)/script_asm.pl 443 444 This is a custom rule, following the normal syntax 445 required by make. 446 447 The target file depends on two prerequisite files. References 448 to the target file are prefixed with $(obj), references 449 to prerequisites are referenced with $(src) (because they are not 450 generated files). 451 452 $(kecho) 453 echoing information to user in a rule is often a good practice 454 but when execution ``make -s`` one does not expect to see any output 455 except for warnings/errors. 456 To support this kbuild defines $(kecho) which will echo out the 457 text following $(kecho) to stdout except if ``make -s`` is used. 458 459 Example:: 460 461 # arch/arm/Makefile 462 $(BOOT_TARGETS): vmlinux 463 $(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $(boot)/$@ 464 @$(kecho) ' Kernel: $(boot)/$@ is ready' 465 466 When kbuild is executing with KBUILD_VERBOSE unset, then only a shorthand 467 of a command is normally displayed. 468 To enable this behaviour for custom commands kbuild requires 469 two variables to be set:: 470 471 quiet_cmd_<command> - what shall be echoed 472 cmd_<command> - the command to execute 473 474 Example:: 475 476 # lib/Makefile 477 quiet_cmd_crc32 = GEN $@ 478 cmd_crc32 = $< > $@ 479 480 $(obj)/crc32table.h: $(obj)/gen_crc32table 481 $(call cmd,crc32) 482 483 When updating the $(obj)/crc32table.h target, the line:: 484 485 GEN lib/crc32table.h 486 487 will be displayed with ``make KBUILD_VERBOSE=``. 488 489 Command change detection 490 ------------------------ 491 492 When the rule is evaluated, timestamps are compared between the target 493 and its prerequisite files. GNU Make updates the target when any of the 494 prerequisites is newer than that. 495 496 The target should be rebuilt also when the command line has changed 497 since the last invocation. This is not supported by Make itself, so 498 Kbuild achieves this by a kind of meta-programming. 499 500 if_changed is the macro used for this purpose, in the following form:: 501 502 quiet_cmd_<command> = ... 503 cmd_<command> = ... 504 505 <target>: <source(s)> FORCE 506 $(call if_changed,<command>) 507 508 Any target that utilizes if_changed must be listed in $(targets), 509 otherwise the command line check will fail, and the target will 510 always be built. 511 512 If the target is already listed in the recognized syntax such as 513 obj-y/m, lib-y/m, extra-y/m, always-y/m, hostprogs, userprogs, Kbuild 514 automatically adds it to $(targets). Otherwise, the target must be 515 explicitly added to $(targets). 516 517 Assignments to $(targets) are without $(obj)/ prefix. if_changed may be 518 used in conjunction with custom rules as defined in `Custom Rules`_. 519 520 Note: It is a typical mistake to forget the FORCE prerequisite. 521 Another common pitfall is that whitespace is sometimes significant; for 522 instance, the below will fail (note the extra space after the comma):: 523 524 target: source(s) FORCE 525 526 **WRONG!** $(call if_changed, objcopy) 527 528 Note: 529 if_changed should not be used more than once per target. 530 It stores the executed command in a corresponding .cmd 531 file and multiple calls would result in overwrites and 532 unwanted results when the target is up to date and only the 533 tests on changed commands trigger execution of commands. 534 535 $(CC) support functions 536 ----------------------- 537 538 The kernel may be built with several different versions of 539 $(CC), each supporting a unique set of features and options. 540 kbuild provides basic support to check for valid options for $(CC). 541 $(CC) is usually the gcc compiler, but other alternatives are 542 available. 543 544 as-option 545 as-option is used to check if $(CC) -- when used to compile 546 assembler (``*.S``) files -- supports the given option. An optional 547 second option may be specified if the first option is not supported. 548 549 Example:: 550 551 #arch/sh/Makefile 552 cflags-y += $(call as-option,-Wa$(comma)-isa=$(isa-y),) 553 554 In the above example, cflags-y will be assigned the option 555 -Wa$(comma)-isa=$(isa-y) if it is supported by $(CC). 556 The second argument is optional, and if supplied will be used 557 if first argument is not supported. 558 559 as-instr 560 as-instr checks if the assembler reports a specific instruction 561 and then outputs either option1 or option2 562 C escapes are supported in the test instruction 563 Note: as-instr-option uses KBUILD_AFLAGS for assembler options 564 565 cc-option 566 cc-option is used to check if $(CC) supports a given option, and if 567 not supported to use an optional second option. 568 569 Example:: 570 571 #arch/x86/Makefile 572 cflags-y += $(call cc-option,-march=pentium-mmx,-march=i586) 573 574 In the above example, cflags-y will be assigned the option 575 -march=pentium-mmx if supported by $(CC), otherwise -march=i586. 576 The second argument to cc-option is optional, and if omitted, 577 cflags-y will be assigned no value if first option is not supported. 578 Note: cc-option uses KBUILD_CFLAGS for $(CC) options 579 580 cc-option-yn 581 cc-option-yn is used to check if $(CC) supports a given option 582 and return "y" if supported, otherwise "n". 583 584 Example:: 585 586 #arch/ppc/Makefile 587 biarch := $(call cc-option-yn, -m32) 588 aflags-$(biarch) += -a32 589 cflags-$(biarch) += -m32 590 591 In the above example, $(biarch) is set to y if $(CC) supports the -m32 592 option. When $(biarch) equals "y", the expanded variables $(aflags-y) 593 and $(cflags-y) will be assigned the values -a32 and -m32, 594 respectively. 595 596 Note: cc-option-yn uses KBUILD_CFLAGS for $(CC) options 597 598 cc-disable-warning 599 cc-disable-warning checks if $(CC) supports a given warning and returns 600 the commandline switch to disable it. This special function is needed, 601 because gcc 4.4 and later accept any unknown -Wno-* option and only 602 warn about it if there is another warning in the source file. 603 604 Example:: 605 606 KBUILD_CFLAGS += $(call cc-disable-warning, unused-but-set-variable) 607 608 In the above example, -Wno-unused-but-set-variable will be added to 609 KBUILD_CFLAGS only if $(CC) really accepts it. 610 611 gcc-min-version 612 gcc-min-version tests if the value of $(CONFIG_GCC_VERSION) is greater than 613 or equal to the provided value and evaluates to y if so. 614 615 Example:: 616 617 cflags-$(call gcc-min-version, 70100) := -foo 618 619 In this example, cflags-y will be assigned the value -foo if $(CC) is gcc and 620 $(CONFIG_GCC_VERSION) is >= 7.1. 621 622 clang-min-version 623 clang-min-version tests if the value of $(CONFIG_CLANG_VERSION) is greater 624 than or equal to the provided value and evaluates to y if so. 625 626 Example:: 627 628 cflags-$(call clang-min-version, 110000) := -foo 629 630 In this example, cflags-y will be assigned the value -foo if $(CC) is clang 631 and $(CONFIG_CLANG_VERSION) is >= 11.0.0. 632 633 cc-cross-prefix 634 cc-cross-prefix is used to check if there exists a $(CC) in path with 635 one of the listed prefixes. The first prefix where there exist a 636 prefix$(CC) in the PATH is returned - and if no prefix$(CC) is found 637 then nothing is returned. 638 639 Additional prefixes are separated by a single space in the 640 call of cc-cross-prefix. 641 642 This functionality is useful for architecture Makefiles that try 643 to set CROSS_COMPILE to well-known values but may have several 644 values to select between. 645 646 It is recommended only to try to set CROSS_COMPILE if it is a cross 647 build (host arch is different from target arch). And if CROSS_COMPILE 648 is already set then leave it with the old value. 649 650 Example:: 651 652 #arch/m68k/Makefile 653 ifneq ($(SUBARCH),$(ARCH)) 654 ifeq ($(CROSS_COMPILE),) 655 CROSS_COMPILE := $(call cc-cross-prefix, m68k-linux-gnu-) 656 endif 657 endif 658 659 $(LD) support functions 660 ----------------------- 661 662 ld-option 663 ld-option is used to check if $(LD) supports the supplied option. 664 ld-option takes two options as arguments. 665 666 The second argument is an optional option that can be used if the 667 first option is not supported by $(LD). 668 669 Example:: 670 671 #Makefile 672 LDFLAGS_vmlinux += $(call ld-option, -X) 673 674 Script invocation 675 ----------------- 676 677 Make rules may invoke scripts to build the kernel. The rules shall 678 always provide the appropriate interpreter to execute the script. They 679 shall not rely on the execute bits being set, and shall not invoke the 680 script directly. For the convenience of manual script invocation, such 681 as invoking ./scripts/checkpatch.pl, it is recommended to set execute 682 bits on the scripts nonetheless. 683 684 Kbuild provides variables $(CONFIG_SHELL), $(AWK), $(PERL), 685 and $(PYTHON3) to refer to interpreters for the respective 686 scripts. 687 688 Example:: 689 690 #Makefile 691 cmd_depmod = $(CONFIG_SHELL) $(srctree)/scripts/depmod.sh $(DEPMOD) \ 692 $(KERNELRELEASE) 693 694 Host Program support 695 ==================== 696 697 Kbuild supports building executables on the host for use during the 698 compilation stage. 699 700 Two steps are required in order to use a host executable. 701 702 The first step is to tell kbuild that a host program exists. This is 703 done utilising the variable ``hostprogs``. 704 705 The second step is to add an explicit dependency to the executable. 706 This can be done in two ways. Either add the dependency in a rule, 707 or utilise the variable ``always-y``. 708 Both possibilities are described in the following. 709 710 Simple Host Program 711 ------------------- 712 713 In some cases there is a need to compile and run a program on the 714 computer where the build is running. 715 716 The following line tells kbuild that the program bin2hex shall be 717 built on the build host. 718 719 Example:: 720 721 hostprogs := bin2hex 722 723 Kbuild assumes in the above example that bin2hex is made from a single 724 c-source file named bin2hex.c located in the same directory as 725 the Makefile. 726 727 Composite Host Programs 728 ----------------------- 729 730 Host programs can be made up based on composite objects. 731 The syntax used to define composite objects for host programs is 732 similar to the syntax used for kernel objects. 733 $(<executable>-objs) lists all objects used to link the final 734 executable. 735 736 Example:: 737 738 #scripts/lxdialog/Makefile 739 hostprogs := lxdialog 740 lxdialog-objs := checklist.o lxdialog.o 741 742 Objects with extension .o are compiled from the corresponding .c 743 files. In the above example, checklist.c is compiled to checklist.o 744 and lxdialog.c is compiled to lxdialog.o. 745 746 Finally, the two .o files are linked to the executable, lxdialog. 747 Note: The syntax <executable>-y is not permitted for host-programs. 748 749 Using C++ for host programs 750 --------------------------- 751 752 kbuild offers support for host programs written in C++. This was 753 introduced solely to support kconfig, and is not recommended 754 for general use. 755 756 Example:: 757 758 #scripts/kconfig/Makefile 759 hostprogs := qconf 760 qconf-cxxobjs := qconf.o 761 762 In the example above the executable is composed of the C++ file 763 qconf.cc - identified by $(qconf-cxxobjs). 764 765 If qconf is composed of a mixture of .c and .cc files, then an 766 additional line can be used to identify this. 767 768 Example:: 769 770 #scripts/kconfig/Makefile 771 hostprogs := qconf 772 qconf-cxxobjs := qconf.o 773 qconf-objs := check.o 774 775 Using Rust for host programs 776 ---------------------------- 777 778 Kbuild offers support for host programs written in Rust. However, 779 since a Rust toolchain is not mandatory for kernel compilation, 780 it may only be used in scenarios where Rust is required to be 781 available (e.g. when ``CONFIG_RUST`` is enabled). 782 783 Example:: 784 785 hostprogs := target 786 target-rust := y 787 788 Kbuild will compile ``target`` using ``target.rs`` as the crate root, 789 located in the same directory as the ``Makefile``. The crate may 790 consist of several source files (see ``samples/rust/hostprogs``). 791 792 Controlling compiler options for host programs 793 ---------------------------------------------- 794 795 When compiling host programs, it is possible to set specific flags. 796 The programs will always be compiled utilising $(HOSTCC) passed 797 the options specified in $(KBUILD_HOSTCFLAGS). 798 799 To set flags that will take effect for all host programs created 800 in that Makefile, use the variable HOST_EXTRACFLAGS. 801 802 Example:: 803 804 #scripts/lxdialog/Makefile 805 HOST_EXTRACFLAGS += -I/usr/include/ncurses 806 807 To set specific flags for a single file the following construction 808 is used: 809 810 Example:: 811 812 #arch/ppc64/boot/Makefile 813 HOSTCFLAGS_piggyback.o := -DKERNELBASE=$(KERNELBASE) 814 815 It is also possible to specify additional options to the linker. 816 817 Example:: 818 819 #scripts/kconfig/Makefile 820 HOSTLDLIBS_qconf := -L$(QTDIR)/lib 821 822 When linking qconf, it will be passed the extra option 823 ``-L$(QTDIR)/lib``. 824 825 When host programs are actually built 826 ------------------------------------- 827 828 Kbuild will only build host-programs when they are referenced 829 as a prerequisite. 830 831 This is possible in two ways: 832 833 (1) List the prerequisite explicitly in a custom rule. 834 835 Example:: 836 837 #drivers/pci/Makefile 838 hostprogs := gen-devlist 839 $(obj)/devlist.h: $(src)/pci.ids $(obj)/gen-devlist 840 ( cd $(obj); ./gen-devlist ) < $< 841 842 The target $(obj)/devlist.h will not be built before 843 $(obj)/gen-devlist is updated. Note that references to 844 the host programs in custom rules must be prefixed with $(obj). 845 846 (2) Use always-y 847 848 When there is no suitable custom rule, and the host program 849 shall be built when a makefile is entered, the always-y 850 variable shall be used. 851 852 Example:: 853 854 #scripts/lxdialog/Makefile 855 hostprogs := lxdialog 856 always-y := $(hostprogs) 857 858 Kbuild provides the following shorthand for this:: 859 860 hostprogs-always-y := lxdialog 861 862 This will tell kbuild to build lxdialog even if not referenced in 863 any rule. 864 865 Userspace Program support 866 ========================= 867 868 Just like host programs, Kbuild also supports building userspace executables 869 for the target architecture (i.e. the same architecture as you are building 870 the kernel for). 871 872 The syntax is quite similar. The difference is to use ``userprogs`` instead of 873 ``hostprogs``. 874 875 Simple Userspace Program 876 ------------------------ 877 878 The following line tells kbuild that the program bpf-direct shall be 879 built for the target architecture. 880 881 Example:: 882 883 userprogs := bpf-direct 884 885 Kbuild assumes in the above example that bpf-direct is made from a 886 single C source file named bpf-direct.c located in the same directory 887 as the Makefile. 888 889 Composite Userspace Programs 890 ---------------------------- 891 892 Userspace programs can be made up based on composite objects. 893 The syntax used to define composite objects for userspace programs is 894 similar to the syntax used for kernel objects. 895 $(<executable>-objs) lists all objects used to link the final 896 executable. 897 898 Example:: 899 900 #samples/seccomp/Makefile 901 userprogs := bpf-fancy 902 bpf-fancy-objs := bpf-fancy.o bpf-helper.o 903 904 Objects with extension .o are compiled from the corresponding .c 905 files. In the above example, bpf-fancy.c is compiled to bpf-fancy.o 906 and bpf-helper.c is compiled to bpf-helper.o. 907 908 Finally, the two .o files are linked to the executable, bpf-fancy. 909 Note: The syntax <executable>-y is not permitted for userspace programs. 910 911 Controlling compiler options for userspace programs 912 --------------------------------------------------- 913 914 When compiling userspace programs, it is possible to set specific flags. 915 The programs will always be compiled utilising $(CC) passed 916 the options specified in $(KBUILD_USERCFLAGS). 917 918 To set flags that will take effect for all userspace programs created 919 in that Makefile, use the variable userccflags. 920 921 Example:: 922 923 # samples/seccomp/Makefile 924 userccflags += -I usr/include 925 926 To set specific flags for a single file the following construction 927 is used: 928 929 Example:: 930 931 bpf-helper-userccflags += -I user/include 932 933 It is also possible to specify additional options to the linker. 934 935 Example:: 936 937 # net/bpfilter/Makefile 938 bpfilter_umh-userldflags += -static 939 940 To specify libraries linked to a userspace program, you can use 941 ``<executable>-userldlibs``. The ``userldlibs`` syntax specifies libraries 942 linked to all userspace programs created in the current Makefile. 943 944 When linking bpfilter_umh, it will be passed the extra option -static. 945 946 From command line, :ref:`USERCFLAGS and USERLDFLAGS <userkbuildflags>` will also be used. 947 948 When userspace programs are actually built 949 ------------------------------------------ 950 951 Kbuild builds userspace programs only when told to do so. 952 There are two ways to do this. 953 954 (1) Add it as the prerequisite of another file 955 956 Example:: 957 958 #net/bpfilter/Makefile 959 userprogs := bpfilter_umh 960 $(obj)/bpfilter_umh_blob.o: $(obj)/bpfilter_umh 961 962 $(obj)/bpfilter_umh is built before $(obj)/bpfilter_umh_blob.o 963 964 (2) Use always-y 965 966 Example:: 967 968 userprogs := binderfs_example 969 always-y := $(userprogs) 970 971 Kbuild provides the following shorthand for this:: 972 973 userprogs-always-y := binderfs_example 974 975 This will tell Kbuild to build binderfs_example when it visits this 976 Makefile. 977 978 Kbuild clean infrastructure 979 =========================== 980 981 ``make clean`` deletes most generated files in the obj tree where the kernel 982 is compiled. This includes generated files such as host programs. 983 Kbuild knows targets listed in $(hostprogs), $(always-y), $(always-m), 984 $(always-), $(extra-y), $(extra-) and $(targets). They are all deleted 985 during ``make clean``. Files matching the patterns ``*.[oas]``, ``*.ko``, plus 986 some additional files generated by kbuild are deleted all over the kernel 987 source tree when ``make clean`` is executed. 988 989 Additional files or directories can be specified in kbuild makefiles by use of 990 $(clean-files). 991 992 Example:: 993 994 #lib/Makefile 995 clean-files := crc32table.h 996 997 When executing ``make clean``, the file ``crc32table.h`` will be deleted. 998 Kbuild will assume files to be in the same relative directory as the 999 Makefile. 1000 1001 To exclude certain files or directories from make clean, use the 1002 $(no-clean-files) variable. 1003 1004 Usually kbuild descends down in subdirectories due to ``obj-* := dir/``, 1005 but in the architecture makefiles where the kbuild infrastructure 1006 is not sufficient this sometimes needs to be explicit. 1007 1008 Example:: 1009 1010 #arch/x86/boot/Makefile 1011 subdir- := compressed 1012 1013 The above assignment instructs kbuild to descend down in the 1014 directory compressed/ when ``make clean`` is executed. 1015 1016 Note 1: arch/$(SRCARCH)/Makefile cannot use ``subdir-``, because that file is 1017 included in the top level makefile. Instead, arch/$(SRCARCH)/Kbuild can use 1018 ``subdir-``. 1019 1020 Note 2: All directories listed in core-y, libs-y, drivers-y and net-y will 1021 be visited during ``make clean``. 1022 1023 Architecture Makefiles 1024 ====================== 1025 1026 The top level Makefile sets up the environment and does the preparation, 1027 before starting to descend down in the individual directories. 1028 1029 The top level makefile contains the generic part, whereas 1030 arch/$(SRCARCH)/Makefile contains what is required to set up kbuild 1031 for said architecture. 1032 1033 To do so, arch/$(SRCARCH)/Makefile sets up a number of variables and defines 1034 a few targets. 1035 1036 When kbuild executes, the following steps are followed (roughly): 1037 1038 1) Configuration of the kernel => produce .config 1039 1040 2) Store kernel version in include/linux/version.h 1041 1042 3) Updating all other prerequisites to the target prepare: 1043 1044 - Additional prerequisites are specified in arch/$(SRCARCH)/Makefile 1045 1046 4) Recursively descend down in all directories listed in 1047 init-* core* drivers-* net-* libs-* and build all targets. 1048 1049 - The values of the above variables are expanded in arch/$(SRCARCH)/Makefile. 1050 1051 5) All object files are then linked and the resulting file vmlinux is 1052 located at the root of the obj tree. 1053 The very first objects linked are listed in scripts/head-object-list.txt. 1054 1055 6) Finally, the architecture-specific part does any required post processing 1056 and builds the final bootimage. 1057 1058 - This includes building boot records 1059 - Preparing initrd images and the like 1060 1061 Set variables to tweak the build to the architecture 1062 ---------------------------------------------------- 1063 1064 KBUILD_LDFLAGS 1065 Generic $(LD) options 1066 1067 Flags used for all invocations of the linker. 1068 Often specifying the emulation is sufficient. 1069 1070 Example:: 1071 1072 #arch/s390/Makefile 1073 KBUILD_LDFLAGS := -m elf_s390 1074 1075 Note: ldflags-y can be used to further customise 1076 the flags used. See `Non-builtin vmlinux targets - extra-y`_. 1077 1078 LDFLAGS_vmlinux 1079 Options for $(LD) when linking vmlinux 1080 1081 LDFLAGS_vmlinux is used to specify additional flags to pass to 1082 the linker when linking the final vmlinux image. 1083 1084 LDFLAGS_vmlinux uses the LDFLAGS_$@ support. 1085 1086 Example:: 1087 1088 #arch/x86/Makefile 1089 LDFLAGS_vmlinux := -e stext 1090 1091 OBJCOPYFLAGS 1092 objcopy flags 1093 1094 When $(call if_changed,objcopy) is used to translate a .o file, 1095 the flags specified in OBJCOPYFLAGS will be used. 1096 1097 $(call if_changed,objcopy) is often used to generate raw binaries on 1098 vmlinux. 1099 1100 Example:: 1101 1102 #arch/s390/Makefile 1103 OBJCOPYFLAGS := -O binary 1104 1105 #arch/s390/boot/Makefile 1106 $(obj)/image: vmlinux FORCE 1107 $(call if_changed,objcopy) 1108 1109 In this example, the binary $(obj)/image is a binary version of 1110 vmlinux. The usage of $(call if_changed,xxx) will be described later. 1111 1112 KBUILD_AFLAGS 1113 Assembler flags 1114 1115 Default value - see top level Makefile. 1116 1117 Append or modify as required per architecture. 1118 1119 Example:: 1120 1121 #arch/sparc64/Makefile 1122 KBUILD_AFLAGS += -m64 -mcpu=ultrasparc 1123 1124 KBUILD_CFLAGS 1125 $(CC) compiler flags 1126 1127 Default value - see top level Makefile. 1128 1129 Append or modify as required per architecture. 1130 1131 Often, the KBUILD_CFLAGS variable depends on the configuration. 1132 1133 Example:: 1134 1135 #arch/x86/boot/compressed/Makefile 1136 cflags-$(CONFIG_X86_32) := -march=i386 1137 cflags-$(CONFIG_X86_64) := -mcmodel=small 1138 KBUILD_CFLAGS += $(cflags-y) 1139 1140 Many arch Makefiles dynamically run the target C compiler to 1141 probe supported options:: 1142 1143 #arch/x86/Makefile 1144 1145 ... 1146 cflags-$(CONFIG_MPENTIUMII) += $(call cc-option,\ 1147 -march=pentium2,-march=i686) 1148 ... 1149 # Disable unit-at-a-time mode ... 1150 KBUILD_CFLAGS += $(call cc-option,-fno-unit-at-a-time) 1151 ... 1152 1153 1154 The first example utilises the trick that a config option expands 1155 to "y" when selected. 1156 1157 KBUILD_RUSTFLAGS 1158 $(RUSTC) compiler flags 1159 1160 Default value - see top level Makefile. 1161 1162 Append or modify as required per architecture. 1163 1164 Often, the KBUILD_RUSTFLAGS variable depends on the configuration. 1165 1166 Note that target specification file generation (for ``--target``) 1167 is handled in ``scripts/generate_rust_target.rs``. 1168 1169 KBUILD_AFLAGS_KERNEL 1170 Assembler options specific for built-in 1171 1172 $(KBUILD_AFLAGS_KERNEL) contains extra C compiler flags used to compile 1173 resident kernel code. 1174 1175 KBUILD_AFLAGS_MODULE 1176 Assembler options specific for modules 1177 1178 $(KBUILD_AFLAGS_MODULE) is used to add arch-specific options that 1179 are used for assembler. 1180 1181 From commandline AFLAGS_MODULE shall be used (see kbuild.rst). 1182 1183 KBUILD_CFLAGS_KERNEL 1184 $(CC) options specific for built-in 1185 1186 $(KBUILD_CFLAGS_KERNEL) contains extra C compiler flags used to compile 1187 resident kernel code. 1188 1189 KBUILD_CFLAGS_MODULE 1190 Options for $(CC) when building modules 1191 1192 $(KBUILD_CFLAGS_MODULE) is used to add arch-specific options that 1193 are used for $(CC). 1194 1195 From commandline CFLAGS_MODULE shall be used (see kbuild.rst). 1196 1197 KBUILD_RUSTFLAGS_KERNEL 1198 $(RUSTC) options specific for built-in 1199 1200 $(KBUILD_RUSTFLAGS_KERNEL) contains extra Rust compiler flags used to 1201 compile resident kernel code. 1202 1203 KBUILD_RUSTFLAGS_MODULE 1204 Options for $(RUSTC) when building modules 1205 1206 $(KBUILD_RUSTFLAGS_MODULE) is used to add arch-specific options that 1207 are used for $(RUSTC). 1208 1209 From commandline RUSTFLAGS_MODULE shall be used (see kbuild.rst). 1210 1211 KBUILD_LDFLAGS_MODULE 1212 Options for $(LD) when linking modules 1213 1214 $(KBUILD_LDFLAGS_MODULE) is used to add arch-specific options 1215 used when linking modules. This is often a linker script. 1216 1217 From commandline LDFLAGS_MODULE shall be used (see kbuild.rst). 1218 1219 KBUILD_LDS 1220 The linker script with full path. Assigned by the top-level Makefile. 1221 1222 KBUILD_VMLINUX_OBJS 1223 All object files for vmlinux. They are linked to vmlinux in the same 1224 order as listed in KBUILD_VMLINUX_OBJS. 1225 1226 The objects listed in scripts/head-object-list.txt are exceptions; 1227 they are placed before the other objects. 1228 1229 KBUILD_VMLINUX_LIBS 1230 All .a ``lib`` files for vmlinux. KBUILD_VMLINUX_OBJS and 1231 KBUILD_VMLINUX_LIBS together specify all the object files used to 1232 link vmlinux. 1233 1234 Add prerequisites to archheaders 1235 -------------------------------- 1236 1237 The archheaders: rule is used to generate header files that 1238 may be installed into user space by ``make header_install``. 1239 1240 It is run before ``make archprepare`` when run on the 1241 architecture itself. 1242 1243 Add prerequisites to archprepare 1244 -------------------------------- 1245 1246 The archprepare: rule is used to list prerequisites that need to be 1247 built before starting to descend down in the subdirectories. 1248 1249 This is usually used for header files containing assembler constants. 1250 1251 Example:: 1252 1253 #arch/arm/Makefile 1254 archprepare: maketools 1255 1256 In this example, the file target maketools will be processed 1257 before descending down in the subdirectories. 1258 1259 See also chapter XXX-TODO that describes how kbuild supports 1260 generating offset header files. 1261 1262 List directories to visit when descending 1263 ----------------------------------------- 1264 1265 An arch Makefile cooperates with the top Makefile to define variables 1266 which specify how to build the vmlinux file. Note that there is no 1267 corresponding arch-specific section for modules; the module-building 1268 machinery is all architecture-independent. 1269 1270 core-y, libs-y, drivers-y 1271 $(libs-y) lists directories where a lib.a archive can be located. 1272 1273 The rest list directories where a built-in.a object file can be 1274 located. 1275 1276 Then the rest follows in this order: 1277 1278 $(core-y), $(libs-y), $(drivers-y) 1279 1280 The top level Makefile defines values for all generic directories, 1281 and arch/$(SRCARCH)/Makefile only adds architecture-specific 1282 directories. 1283 1284 Example:: 1285 1286 # arch/sparc/Makefile 1287 core-y += arch/sparc/ 1288 1289 libs-y += arch/sparc/prom/ 1290 libs-y += arch/sparc/lib/ 1291 1292 drivers-$(CONFIG_PM) += arch/sparc/power/ 1293 1294 Architecture-specific boot images 1295 --------------------------------- 1296 1297 An arch Makefile specifies goals that take the vmlinux file, compress 1298 it, wrap it in bootstrapping code, and copy the resulting files 1299 somewhere. This includes various kinds of installation commands. 1300 The actual goals are not standardized across architectures. 1301 1302 It is common to locate any additional processing in a boot/ 1303 directory below arch/$(SRCARCH)/. 1304 1305 Kbuild does not provide any smart way to support building a 1306 target specified in boot/. Therefore arch/$(SRCARCH)/Makefile shall 1307 call make manually to build a target in boot/. 1308 1309 The recommended approach is to include shortcuts in 1310 arch/$(SRCARCH)/Makefile, and use the full path when calling down 1311 into the arch/$(SRCARCH)/boot/Makefile. 1312 1313 Example:: 1314 1315 #arch/x86/Makefile 1316 boot := arch/x86/boot 1317 bzImage: vmlinux 1318 $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@ 1319 1320 ``$(Q)$(MAKE) $(build)=<dir>`` is the recommended way to invoke 1321 make in a subdirectory. 1322 1323 There are no rules for naming architecture-specific targets, 1324 but executing ``make help`` will list all relevant targets. 1325 To support this, $(archhelp) must be defined. 1326 1327 Example:: 1328 1329 #arch/x86/Makefile 1330 define archhelp 1331 echo '* bzImage - Compressed kernel image (arch/x86/boot/bzImage)' 1332 endif 1333 1334 When make is executed without arguments, the first goal encountered 1335 will be built. In the top level Makefile the first goal present 1336 is all:. 1337 1338 An architecture shall always, per default, build a bootable image. 1339 In ``make help``, the default goal is highlighted with a ``*``. 1340 1341 Add a new prerequisite to all: to select a default goal different 1342 from vmlinux. 1343 1344 Example:: 1345 1346 #arch/x86/Makefile 1347 all: bzImage 1348 1349 When ``make`` is executed without arguments, bzImage will be built. 1350 1351 Commands useful for building a boot image 1352 ----------------------------------------- 1353 1354 Kbuild provides a few macros that are useful when building a 1355 boot image. 1356 1357 ld 1358 Link target. Often, LDFLAGS_$@ is used to set specific options to ld. 1359 1360 Example:: 1361 1362 #arch/x86/boot/Makefile 1363 LDFLAGS_bootsect := -Ttext 0x0 -s --oformat binary 1364 LDFLAGS_setup := -Ttext 0x0 -s --oformat binary -e begtext 1365 1366 targets += setup setup.o bootsect bootsect.o 1367 $(obj)/setup $(obj)/bootsect: %: %.o FORCE 1368 $(call if_changed,ld) 1369 1370 In this example, there are two possible targets, requiring different 1371 options to the linker. The linker options are specified using the 1372 LDFLAGS_$@ syntax - one for each potential target. 1373 1374 $(targets) are assigned all potential targets, by which kbuild knows 1375 the targets and will: 1376 1377 1) check for commandline changes 1378 2) delete target during make clean 1379 1380 The ``: %: %.o`` part of the prerequisite is a shorthand that 1381 frees us from listing the setup.o and bootsect.o files. 1382 1383 Note: 1384 It is a common mistake to forget the ``targets :=`` assignment, 1385 resulting in the target file being recompiled for no 1386 obvious reason. 1387 1388 objcopy 1389 Copy binary. Uses OBJCOPYFLAGS usually specified in 1390 arch/$(SRCARCH)/Makefile. 1391 1392 OBJCOPYFLAGS_$@ may be used to set additional options. 1393 1394 gzip 1395 Compress target. Use maximum compression to compress target. 1396 1397 Example:: 1398 1399 #arch/x86/boot/compressed/Makefile 1400 $(obj)/vmlinux.bin.gz: $(vmlinux.bin.all-y) FORCE 1401 $(call if_changed,gzip) 1402 1403 dtc 1404 Create flattened device tree blob object suitable for linking 1405 into vmlinux. Device tree blobs linked into vmlinux are placed 1406 in an init section in the image. Platform code *must* copy the 1407 blob to non-init memory prior to calling unflatten_device_tree(). 1408 1409 To use this command, simply add ``*.dtb`` into obj-y or targets, or make 1410 some other target depend on ``%.dtb`` 1411 1412 A central rule exists to create ``$(obj)/%.dtb`` from ``$(src)/%.dts``; 1413 architecture Makefiles do no need to explicitly write out that rule. 1414 1415 Example:: 1416 1417 targets += $(dtb-y) 1418 DTC_FLAGS ?= -p 1024 1419 1420 Preprocessing linker scripts 1421 ---------------------------- 1422 1423 When the vmlinux image is built, the linker script 1424 arch/$(SRCARCH)/kernel/vmlinux.lds is used. 1425 1426 The script is a preprocessed variant of the file vmlinux.lds.S 1427 located in the same directory. 1428 1429 kbuild knows .lds files and includes a rule ``*lds.S`` -> ``*lds``. 1430 1431 Example:: 1432 1433 #arch/x86/kernel/Makefile 1434 extra-y := vmlinux.lds 1435 1436 The assignment to extra-y is used to tell kbuild to build the 1437 target vmlinux.lds. 1438 1439 The assignment to $(CPPFLAGS_vmlinux.lds) tells kbuild to use the 1440 specified options when building the target vmlinux.lds. 1441 1442 When building the ``*.lds`` target, kbuild uses the variables:: 1443 1444 KBUILD_CPPFLAGS : Set in top-level Makefile 1445 cppflags-y : May be set in the kbuild makefile 1446 CPPFLAGS_$(@F) : Target-specific flags. 1447 Note that the full filename is used in this 1448 assignment. 1449 1450 The kbuild infrastructure for ``*lds`` files is used in several 1451 architecture-specific files. 1452 1453 Generic header files 1454 -------------------- 1455 1456 The directory include/asm-generic contains the header files 1457 that may be shared between individual architectures. 1458 1459 The recommended approach how to use a generic header file is 1460 to list the file in the Kbuild file. 1461 1462 See `generic-y`_ for further info on syntax etc. 1463 1464 Post-link pass 1465 -------------- 1466 1467 If the file arch/xxx/Makefile.postlink exists, this makefile 1468 will be invoked for post-link objects (vmlinux and modules.ko) 1469 for architectures to run post-link passes on. Must also handle 1470 the clean target. 1471 1472 This pass runs after kallsyms generation. If the architecture 1473 needs to modify symbol locations, rather than manipulate the 1474 kallsyms, it may be easier to add another postlink target for 1475 .tmp_vmlinux? targets to be called from link-vmlinux.sh. 1476 1477 For example, powerpc uses this to check relocation sanity of 1478 the linked vmlinux file. 1479 1480 Kbuild syntax for exported headers 1481 ================================== 1482 1483 The kernel includes a set of headers that is exported to userspace. 1484 Many headers can be exported as-is but other headers require a 1485 minimal pre-processing before they are ready for user-space. 1486 1487 The pre-processing does: 1488 1489 - drop kernel-specific annotations 1490 - drop include of compiler.h 1491 - drop all sections that are kernel internal (guarded by ``ifdef __KERNEL__``) 1492 1493 All headers under include/uapi/, include/generated/uapi/, 1494 arch/<arch>/include/uapi/ and arch/<arch>/include/generated/uapi/ 1495 are exported. 1496 1497 A Kbuild file may be defined under arch/<arch>/include/uapi/asm/ and 1498 arch/<arch>/include/asm/ to list asm files coming from asm-generic. 1499 1500 See subsequent chapter for the syntax of the Kbuild file. 1501 1502 no-export-headers 1503 ----------------- 1504 1505 no-export-headers is essentially used by include/uapi/linux/Kbuild to 1506 avoid exporting specific headers (e.g. kvm.h) on architectures that do 1507 not support it. It should be avoided as much as possible. 1508 1509 generic-y 1510 --------- 1511 1512 If an architecture uses a verbatim copy of a header from 1513 include/asm-generic then this is listed in the file 1514 arch/$(SRCARCH)/include/asm/Kbuild like this: 1515 1516 Example:: 1517 1518 #arch/x86/include/asm/Kbuild 1519 generic-y += termios.h 1520 generic-y += rtc.h 1521 1522 During the prepare phase of the build a wrapper include 1523 file is generated in the directory:: 1524 1525 arch/$(SRCARCH)/include/generated/asm 1526 1527 When a header is exported where the architecture uses 1528 the generic header a similar wrapper is generated as part 1529 of the set of exported headers in the directory:: 1530 1531 usr/include/asm 1532 1533 The generated wrapper will in both cases look like the following: 1534 1535 Example: termios.h:: 1536 1537 #include <asm-generic/termios.h> 1538 1539 generated-y 1540 ----------- 1541 1542 If an architecture generates other header files alongside generic-y 1543 wrappers, generated-y specifies them. 1544 1545 This prevents them being treated as stale asm-generic wrappers and 1546 removed. 1547 1548 Example:: 1549 1550 #arch/x86/include/asm/Kbuild 1551 generated-y += syscalls_32.h 1552 1553 mandatory-y 1554 ----------- 1555 1556 mandatory-y is essentially used by include/(uapi/)asm-generic/Kbuild 1557 to define the minimum set of ASM headers that all architectures must have. 1558 1559 This works like optional generic-y. If a mandatory header is missing 1560 in arch/$(SRCARCH)/include/(uapi/)/asm, Kbuild will automatically 1561 generate a wrapper of the asm-generic one. 1562 1563 Kbuild Variables 1564 ================ 1565 1566 The top Makefile exports the following variables: 1567 1568 VERSION, PATCHLEVEL, SUBLEVEL, EXTRAVERSION 1569 These variables define the current kernel version. A few arch 1570 Makefiles actually use these values directly; they should use 1571 $(KERNELRELEASE) instead. 1572 1573 $(VERSION), $(PATCHLEVEL), and $(SUBLEVEL) define the basic 1574 three-part version number, such as "2", "4", and "0". These three 1575 values are always numeric. 1576 1577 $(EXTRAVERSION) defines an even tinier sublevel for pre-patches 1578 or additional patches. It is usually some non-numeric string 1579 such as "-pre4", and is often blank. 1580 1581 KERNELRELEASE 1582 $(KERNELRELEASE) is a single string such as "2.4.0-pre4", suitable 1583 for constructing installation directory names or showing in 1584 version strings. Some arch Makefiles use it for this purpose. 1585 1586 ARCH 1587 This variable defines the target architecture, such as "i386", 1588 "arm", or "sparc". Some kbuild Makefiles test $(ARCH) to 1589 determine which files to compile. 1590 1591 By default, the top Makefile sets $(ARCH) to be the same as the 1592 host system architecture. For a cross build, a user may 1593 override the value of $(ARCH) on the command line:: 1594 1595 make ARCH=m68k ... 1596 1597 SRCARCH 1598 This variable specifies the directory in arch/ to build. 1599 1600 ARCH and SRCARCH may not necessarily match. A couple of arch 1601 directories are biarch, that is, a single ``arch/*/`` directory supports 1602 both 32-bit and 64-bit. 1603 1604 For example, you can pass in ARCH=i386, ARCH=x86_64, or ARCH=x86. 1605 For all of them, SRCARCH=x86 because arch/x86/ supports both i386 and 1606 x86_64. 1607 1608 INSTALL_PATH 1609 This variable defines a place for the arch Makefiles to install 1610 the resident kernel image and System.map file. 1611 Use this for architecture-specific install targets. 1612 1613 INSTALL_MOD_PATH, MODLIB 1614 $(INSTALL_MOD_PATH) specifies a prefix to $(MODLIB) for module 1615 installation. This variable is not defined in the Makefile but 1616 may be passed in by the user if desired. 1617 1618 $(MODLIB) specifies the directory for module installation. 1619 The top Makefile defines $(MODLIB) to 1620 $(INSTALL_MOD_PATH)/lib/modules/$(KERNELRELEASE). The user may 1621 override this value on the command line if desired. 1622 1623 INSTALL_MOD_STRIP 1624 If this variable is specified, it will cause modules to be stripped 1625 after they are installed. If INSTALL_MOD_STRIP is "1", then the 1626 default option --strip-debug will be used. Otherwise, the 1627 INSTALL_MOD_STRIP value will be used as the option(s) to the strip 1628 command. 1629 1630 INSTALL_DTBS_PATH 1631 This variable specifies a prefix for relocations required by build 1632 roots. It defines a place for installing the device tree blobs. Like 1633 INSTALL_MOD_PATH, it isn't defined in the Makefile, but can be passed 1634 by the user if desired. Otherwise it defaults to the kernel install 1635 path. 1636 1637 Makefile language 1638 ================= 1639 1640 The kernel Makefiles are designed to be run with GNU Make. The Makefiles 1641 use only the documented features of GNU Make, but they do use many 1642 GNU extensions. 1643 1644 GNU Make supports elementary list-processing functions. The kernel 1645 Makefiles use a novel style of list building and manipulation with few 1646 ``if`` statements. 1647 1648 GNU Make has two assignment operators, ``:=`` and ``=``. ``:=`` performs 1649 immediate evaluation of the right-hand side and stores an actual string 1650 into the left-hand side. ``=`` is like a formula definition; it stores the 1651 right-hand side in an unevaluated form and then evaluates this form each 1652 time the left-hand side is used. 1653 1654 There are some cases where ``=`` is appropriate. Usually, though, ``:=`` 1655 is the right choice. 1656 1657 Credits 1658 ======= 1659 1660 - Original version made by Michael Elizabeth Chastain, <mailto:mec@shout.net> 1661 - Updates by Kai Germaschewski <kai@tp1.ruhr-uni-bochum.de> 1662 - Updates by Sam Ravnborg <sam@ravnborg.org> 1663 - Language QA by Jan Engelhardt <jengelh@gmx.de> 1664 1665 TODO 1666 ==== 1667 1668 - Generating offset header files. 1669 - Add more variables to chapters 7 or 9?
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.