1 ============================================== 2 spi_lm70llp : LM70-LLP parport-to-SPI adapter 3 ============================================== 4 5 Supported board/chip: 6 7 * National Semiconductor LM70 LLP evaluation board 8 9 Datasheet: https://www.ti.com/lit/gpn/lm70 10 11 Author: 12 Kaiwan N Billimoria <kaiwan@designergraphix.com> 13 14 Description 15 ----------- 16 This driver provides glue code connecting a National Semiconductor LM70 LLP 17 temperature sensor evaluation board to the kernel's SPI core subsystem. 18 19 This is a SPI master controller driver. It can be used in conjunction with 20 (layered under) the LM70 logical driver (a "SPI protocol driver"). 21 In effect, this driver turns the parallel port interface on the eval board 22 into a SPI bus with a single device, which will be driven by the generic 23 LM70 driver (drivers/hwmon/lm70.c). 24 25 26 Hardware Interfacing 27 -------------------- 28 The schematic for this particular board (the LM70EVAL-LLP) is 29 available (on page 4) here: 30 31 https://download.datasheets.com/pdfs/documentation/nat/kit&board/lm70llpevalmanual.pdf 32 33 The hardware interfacing on the LM70 LLP eval board is as follows: 34 35 ======== == ========= ========== 36 Parallel LM70 LLP 37 Port . Direction JP2 Header 38 ======== == ========= ========== 39 D0 2 - - 40 D1 3 --> V+ 5 41 D2 4 --> V+ 5 42 D3 5 --> V+ 5 43 D4 6 --> V+ 5 44 D5 7 --> nCS 8 45 D6 8 --> SCLK 3 46 D7 9 --> SI/O 5 47 GND 25 - GND 7 48 Select 13 <-- SI/O 1 49 ======== == ========= ========== 50 51 Note that since the LM70 uses a "3-wire" variant of SPI, the SI/SO pin 52 is connected to both pin D7 (as Master Out) and Select (as Master In) 53 using an arrangement that lets either the parport or the LM70 pull the 54 pin low. This can't be shared with true SPI devices, but other 3-wire 55 devices might share the same SI/SO pin. 56 57 The bitbanger routine in this driver (lm70_txrx) is called back from 58 the bound "hwmon/lm70" protocol driver through its sysfs hook, using a 59 spi_write_then_read() call. It performs Mode 0 (SPI/Microwire) bitbanging. 60 The lm70 driver then interprets the resulting digital temperature value 61 and exports it through sysfs. 62 63 A "gotcha": National Semiconductor's LM70 LLP eval board circuit schematic 64 shows that the SI/O line from the LM70 chip is connected to the base of a 65 transistor Q1 (and also a pullup, and a zener diode to D7); while the 66 collector is tied to VCC. 67 68 Interpreting this circuit, when the LM70 SI/O line is High (or tristate 69 and not grounded by the host via D7), the transistor conducts and switches 70 the collector to zero, which is reflected on pin 13 of the DB25 parport 71 connector. When SI/O is Low (driven by the LM70 or the host) on the other 72 hand, the transistor is cut off and the voltage tied to its collector is 73 reflected on pin 13 as a High level. 74 75 So: the getmiso inline routine in this driver takes this fact into account, 76 inverting the value read at pin 13. 77 78 79 Thanks to 80 --------- 81 82 - David Brownell for mentoring the SPI-side driver development. 83 - Dr.Craig Hollabaugh for the (early) "manual" bitbanging driver version. 84 - Nadir Billimoria for help interpreting the circuit schematic.
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.