1 ================ 2 MSR Trace Events 3 ================ 4 5 The x86 kernel supports tracing most MSR (Model Specific Register) accesses. 6 To see the definition of the MSRs on Intel systems please see the SDM 7 at https://www.intel.com/sdm (Volume 3) 8 9 Available trace points: 10 11 /sys/kernel/tracing/events/msr/ 12 13 Trace MSR reads: 14 15 read_msr 16 17 - msr: MSR number 18 - val: Value written 19 - failed: 1 if the access failed, otherwise 0 20 21 22 Trace MSR writes: 23 24 write_msr 25 26 - msr: MSR number 27 - val: Value written 28 - failed: 1 if the access failed, otherwise 0 29 30 31 Trace RDPMC in kernel: 32 33 rdpmc 34 35 The trace data can be post processed with the postprocess/decode_msr.py script:: 36 37 cat /sys/kernel/tracing/trace | decode_msr.py /usr/src/linux/include/asm/msr-index.h 38 39 to add symbolic MSR names. 40
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