1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (C) 2014, 2015 Synopsys, Inc. (www.synopsys.com)
4 */
5
6 /*
7 * Device tree for AXC003 CPU card:
8 * HS38x2 (Dual Core) with IDU intc (VDK version)
9 */
10
11 /include/ "skeleton_hs_idu.dtsi"
12
13 / {
14 compatible = "snps,arc";
15 #address-cells = <1>;
16 #size-cells = <1>;
17
18 cpu_card {
19 compatible = "simple-bus";
20 #address-cells = <1>;
21 #size-cells = <1>;
22
23 ranges = <0x00000000 0xf0000000 0x10000000>;
24
25 core_clk: core_clk {
26 #clock-cells = <0>;
27 compatible = "fixed-clock";
28 clock-frequency = <50000000>;
29 };
30
31 core_intc: archs-intc@cpu {
32 compatible = "snps,archs-intc";
33 interrupt-controller;
34 #interrupt-cells = <1>;
35 };
36
37 idu_intc: idu-interrupt-controller {
38 compatible = "snps,archs-idu-intc";
39 interrupt-controller;
40 interrupt-parent = <&core_intc>;
41 #interrupt-cells = <1>;
42 };
43
44 debug_uart: dw-apb-uart@5000 {
45 compatible = "snps,dw-apb-uart";
46 reg = <0x5000 0x100>;
47 clock-frequency = <2403200>;
48 interrupt-parent = <&idu_intc>;
49 interrupts = <2>;
50 baud = <115200>;
51 reg-shift = <2>;
52 reg-io-width = <4>;
53 };
54
55 };
56
57 mb_intc: interrupt-controller@e0012000 {
58 #interrupt-cells = <1>;
59 compatible = "snps,dw-apb-ictl";
60 reg = < 0xe0012000 0x200 >;
61 interrupt-controller;
62 interrupt-parent = <&idu_intc>;
63 interrupts = <0>;
64 };
65
66 memory {
67 #address-cells = <1>;
68 #size-cells = <1>;
69 ranges = <0x00000000 0x80000000 0x40000000>;
70 device_type = "memory";
71 reg = <0x80000000 0x20000000>; /* 512MiB */
72 };
73 };
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