1 /*
2 * Copyright 2017 Chen-Yu Tsai
3 *
4 * Chen-Yu Tsai <wens@csie.org>
5 *
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
9 * whole.
10 *
11 * a) This file is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of the
14 * License, or (at your option) any later version.
15 *
16 * This file is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * Or, alternatively,
22 *
23 * b) Permission is hereby granted, free of charge, to any person
24 * obtaining a copy of this software and associated documentation
25 * files (the "Software"), to deal in the Software without
26 * restriction, including without limitation the rights to use,
27 * copy, modify, merge, publish, distribute, sublicense, and/or
28 * sell copies of the Software, and to permit persons to whom the
29 * Software is furnished to do so, subject to the following
30 * conditions:
31 *
32 * The above copyright notice and this permission notice shall be
33 * included in all copies or substantial portions of the Software.
34 *
35 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
36 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
37 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
38 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
39 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
40 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
41 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
42 * OTHER DEALINGS IN THE SOFTWARE.
43 */
44
45 /dts-v1/;
46 #include "sun8i-a83t.dtsi"
47
48 #include <dt-bindings/gpio/gpio.h>
49
50 / {
51 model = "Banana Pi BPI-M3";
52 compatible = "sinovoip,bpi-m3", "allwinner,sun8i-a83t";
53
54 aliases {
55 ethernet0 = &emac;
56 serial0 = &uart0;
57 };
58
59 chosen {
60 stdout-path = "serial0:115200n8";
61 };
62
63 connector {
64 compatible = "hdmi-connector";
65 type = "a";
66
67 port {
68 hdmi_con_in: endpoint {
69 remote-endpoint = <&hdmi_out_con>;
70 };
71 };
72 };
73
74 leds {
75 compatible = "gpio-leds";
76
77 led-0 {
78 label = "bananapi-m3:blue:usr";
79 gpios = <&axp_gpio 1 GPIO_ACTIVE_HIGH>;
80 };
81
82 led-1 {
83 label = "bananapi-m3:green:usr";
84 gpios = <&axp_gpio 0 GPIO_ACTIVE_HIGH>;
85 };
86 };
87
88 reg_usb1_vbus: reg-usb1-vbus {
89 compatible = "regulator-fixed";
90 regulator-name = "usb1-vbus";
91 regulator-min-microvolt = <5000000>;
92 regulator-max-microvolt = <5000000>;
93 regulator-boot-on;
94 enable-active-high;
95 gpio = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */
96 };
97
98 wifi_pwrseq: pwrseq {
99 compatible = "mmc-pwrseq-simple";
100 clocks = <&ac100_rtc 1>;
101 clock-names = "ext_clock";
102 /* The WiFi low power clock must be 32768 Hz */
103 assigned-clocks = <&ac100_rtc 1>;
104 assigned-clock-rates = <32768>;
105 /* enables internal regulator and de-asserts reset */
106 reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 WL-PMU-EN */
107 };
108
109 /*
110 * Power supply for the SATA disk, behind a USB-SATA bridge.
111 * Since it is a USB device, there is no consumer in the DT, so we
112 * have to keep this always on.
113 */
114 regulator-sata-disk-pwr {
115 compatible = "regulator-fixed";
116 regulator-name = "sata-disk-pwr";
117 regulator-min-microvolt = <5000000>;
118 regulator-max-microvolt = <5000000>;
119 regulator-always-on;
120 enable-active-high;
121 gpio = <&pio 3 25 GPIO_ACTIVE_HIGH>; /* PD25 */
122 };
123 };
124
125 &cpu0 {
126 cpu-supply = <®_dcdc2>;
127 };
128
129 &cpu100 {
130 cpu-supply = <®_dcdc3>;
131 };
132
133 &de {
134 status = "okay";
135 };
136
137 &ehci0 {
138 /* Terminus Tech FE 1.1s 4-port USB 2.0 hub here */
139 status = "okay";
140
141 /* TODO GL830 USB-to-SATA bridge downstream w/ GPIO power controls */
142 };
143
144 &emac {
145 pinctrl-names = "default";
146 pinctrl-0 = <&emac_rgmii_pins>;
147 phy-supply = <®_sw>;
148 phy-handle = <&rgmii_phy>;
149 phy-mode = "rgmii-id";
150 allwinner,rx-delay-ps = <700>;
151 allwinner,tx-delay-ps = <700>;
152 status = "okay";
153 };
154
155 &hdmi {
156 status = "okay";
157 };
158
159 &hdmi_out {
160 hdmi_out_con: endpoint {
161 remote-endpoint = <&hdmi_con_in>;
162 };
163 };
164
165 &mdio {
166 rgmii_phy: ethernet-phy@1 {
167 compatible = "ethernet-phy-ieee802.3-c22";
168 reg = <1>;
169 };
170 };
171
172 &mmc0 {
173 pinctrl-names = "default";
174 pinctrl-0 = <&mmc0_pins>;
175 vmmc-supply = <®_dcdc1>;
176 bus-width = <4>;
177 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
178 status = "okay";
179 };
180
181 &mmc1 {
182 vmmc-supply = <®_dldo1>;
183 vqmmc-supply = <®_dldo1>;
184 mmc-pwrseq = <&wifi_pwrseq>;
185 bus-width = <4>;
186 non-removable;
187 status = "okay";
188
189 brcmf: wifi@1 {
190 reg = <1>;
191 compatible = "brcm,bcm4329-fmac";
192 interrupt-parent = <&r_pio>;
193 interrupts = <0 3 IRQ_TYPE_LEVEL_LOW>;
194 interrupt-names = "host-wake";
195 };
196 };
197
198 &mmc2 {
199 pinctrl-names = "default";
200 pinctrl-0 = <&mmc2_8bit_emmc_pins>;
201 vmmc-supply = <®_dcdc1>;
202 vqmmc-supply = <®_dcdc1>;
203 bus-width = <8>;
204 non-removable;
205 cap-mmc-hw-reset;
206 status = "okay";
207 };
208
209 &r_cir {
210 clock-frequency = <3000000>;
211 status = "okay";
212 };
213
214 &r_rsb {
215 status = "okay";
216
217 axp81x: pmic@3a3 {
218 compatible = "x-powers,axp813";
219 reg = <0x3a3>;
220 interrupt-parent = <&r_intc>;
221 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>;
222 eldoin-supply = <®_dcdc1>;
223 fldoin-supply = <®_dcdc5>;
224 swin-supply = <®_dcdc1>;
225 x-powers,drive-vbus-en;
226 };
227
228 ac100: codec@e89 {
229 compatible = "x-powers,ac100";
230 reg = <0xe89>;
231
232 ac100_codec: codec {
233 compatible = "x-powers,ac100-codec";
234 interrupt-parent = <&r_pio>;
235 interrupts = <0 11 IRQ_TYPE_LEVEL_LOW>; /* PL11 */
236 #clock-cells = <0>;
237 clock-output-names = "4M_adda";
238 };
239
240 ac100_rtc: rtc {
241 compatible = "x-powers,ac100-rtc";
242 interrupt-parent = <&r_intc>;
243 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>;
244 clocks = <&ac100_codec>;
245 #clock-cells = <1>;
246 clock-output-names = "cko1_rtc",
247 "cko2_rtc",
248 "cko3_rtc";
249 };
250 };
251 };
252
253 #include "axp81x.dtsi"
254
255 &ac_power_supply {
256 status = "okay";
257 };
258
259 &battery_power_supply {
260 status = "okay";
261 };
262
263 ®_aldo1 {
264 regulator-always-on;
265 regulator-min-microvolt = <1800000>;
266 regulator-max-microvolt = <1800000>;
267 regulator-name = "vcc-1v8";
268 };
269
270 ®_aldo2 {
271 regulator-always-on;
272 regulator-min-microvolt = <1800000>;
273 regulator-max-microvolt = <1800000>;
274 regulator-name = "dram-pll";
275 };
276
277 ®_aldo3 {
278 regulator-always-on;
279 regulator-min-microvolt = <3000000>;
280 regulator-max-microvolt = <3000000>;
281 regulator-name = "avcc";
282 };
283
284 ®_dcdc1 {
285 /* schematics says 3.1V but FEX file says 3.3V */
286 regulator-always-on;
287 regulator-min-microvolt = <3300000>;
288 regulator-max-microvolt = <3300000>;
289 regulator-name = "vcc-3v3";
290 };
291
292 ®_dcdc2 {
293 regulator-always-on;
294 regulator-min-microvolt = <700000>;
295 regulator-max-microvolt = <1100000>;
296 regulator-name = "vdd-cpua";
297 };
298
299 ®_dcdc3 {
300 regulator-always-on;
301 regulator-min-microvolt = <700000>;
302 regulator-max-microvolt = <1100000>;
303 regulator-name = "vdd-cpub";
304 };
305
306 ®_dcdc4 {
307 regulator-min-microvolt = <700000>;
308 regulator-max-microvolt = <1100000>;
309 regulator-name = "vdd-gpu";
310 };
311
312 ®_dcdc5 {
313 regulator-always-on;
314 regulator-min-microvolt = <1200000>;
315 regulator-max-microvolt = <1200000>;
316 regulator-name = "vcc-dram";
317 };
318
319 ®_dcdc6 {
320 regulator-always-on;
321 regulator-min-microvolt = <900000>;
322 regulator-max-microvolt = <900000>;
323 regulator-name = "vdd-sys";
324 };
325
326 ®_dldo1 {
327 /*
328 * This powers both the WiFi/BT module's main power, I/O supply,
329 * and external pull-ups on all the data lines. It should be set
330 * to the same voltage as the I/O supply (DCDC1 in this case) to
331 * avoid any leakage or mismatch.
332 */
333 regulator-min-microvolt = <3300000>;
334 regulator-max-microvolt = <3300000>;
335 regulator-name = "vcc-wifi";
336 };
337
338 ®_dldo3 {
339 regulator-always-on;
340 regulator-min-microvolt = <3300000>;
341 regulator-max-microvolt = <3300000>;
342 regulator-name = "vcc-pd";
343 };
344
345 ®_drivevbus {
346 regulator-name = "usb0-vbus";
347 status = "okay";
348 };
349
350 ®_fldo1 {
351 regulator-min-microvolt = <1080000>;
352 regulator-max-microvolt = <1320000>;
353 regulator-name = "vdd12-hsic";
354 };
355
356 ®_fldo2 {
357 /*
358 * Despite the embedded CPUs core not being used in any way,
359 * this must remain on or the system will hang.
360 */
361 regulator-always-on;
362 regulator-min-microvolt = <700000>;
363 regulator-max-microvolt = <1100000>;
364 regulator-name = "vdd-cpus";
365 };
366
367 ®_rtc_ldo {
368 regulator-name = "vcc-rtc";
369 };
370
371 ®_sw {
372 /*
373 * The PHY requires 20ms after all voltages
374 * are applied until core logic is ready and
375 * 30ms after the reset pin is de-asserted.
376 * Set a 100ms delay to account for PMIC
377 * ramp time and board traces.
378 */
379 regulator-enable-ramp-delay = <100000>;
380 regulator-name = "vcc-ephy";
381 };
382
383 &uart0 {
384 pinctrl-names = "default";
385 pinctrl-0 = <&uart0_pb_pins>;
386 status = "okay";
387 };
388
389 &uart1 {
390 pinctrl-names = "default";
391 pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
392 uart-has-rtscts;
393 status = "okay";
394
395 bluetooth {
396 compatible = "brcm,bcm43438-bt";
397 clocks = <&ac100_rtc 1>;
398 clock-names = "lpo";
399 vbat-supply = <®_dldo1>;
400 vddio-supply = <®_dldo1>;
401 device-wakeup-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */
402 host-wakeup-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */
403 shutdown-gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */
404 };
405 };
406
407 &usb_otg {
408 dr_mode = "otg";
409 status = "okay";
410 };
411
412 &usb_power_supply {
413 status = "okay";
414 };
415
416 &usbphy {
417 usb0_id_det-gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>; /* PH11 */
418 usb0_vbus_power-supply = <&usb_power_supply>;
419 usb0_vbus-supply = <®_drivevbus>;
420 usb1_vbus-supply = <®_usb1_vbus>;
421 status = "okay";
422 };
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