1 /*
2 * Copyright 2015 Tyler Baker
3 *
4 * Tyler Baker <tyler.baker@linaro.org>
5 * Chen-Yu Tsai <wens@csie.org>
6 *
7 * This file is dual-licensed: you can use it either under the terms
8 * of the GPL or the X11 license, at your option. Note that this dual
9 * licensing only applies to this file, and not this project as a
10 * whole.
11 *
12 * a) This file is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of the
15 * License, or (at your option) any later version.
16 *
17 * This file is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * Or, alternatively,
23 *
24 * b) Permission is hereby granted, free of charge, to any person
25 * obtaining a copy of this software and associated documentation
26 * files (the "Software"), to deal in the Software without
27 * restriction, including without limitation the rights to use,
28 * copy, modify, merge, publish, distribute, sublicense, and/or
29 * sell copies of the Software, and to permit persons to whom the
30 * Software is furnished to do so, subject to the following
31 * conditions:
32 *
33 * The above copyright notice and this permission notice shall be
34 * included in all copies or substantial portions of the Software.
35 *
36 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
37 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
38 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
39 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
40 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
41 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
42 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
43 * OTHER DEALINGS IN THE SOFTWARE.
44 */
45
46 /dts-v1/;
47 #include "sun9i-a80.dtsi"
48
49 #include <dt-bindings/gpio/gpio.h>
50
51 / {
52 model = "Cubietech Cubieboard4";
53 compatible = "cubietech,a80-cubieboard4", "allwinner,sun9i-a80";
54
55 aliases {
56 serial0 = &uart0;
57 };
58
59 chosen {
60 stdout-path = "serial0:115200n8";
61 };
62
63 leds {
64 compatible = "gpio-leds";
65
66 led-0 {
67 label = "cubieboard4:green:usr";
68 gpios = <&pio 7 17 GPIO_ACTIVE_HIGH>; /* PH17 */
69 };
70
71 led-1 {
72 label = "cubieboard4:red:usr";
73 gpios = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */
74 };
75 };
76
77 vga-connector {
78 compatible = "vga-connector";
79 label = "vga";
80 ddc-i2c-bus = <&i2c3>;
81
82 port {
83 vga_con_in: endpoint {
84 remote-endpoint = <&vga_dac_out>;
85 };
86 };
87 };
88
89 vga-dac {
90 compatible = "corpro,gm7123", "adi,adv7123";
91 vdd-supply = <®_dcdc1>;
92
93 ports {
94 #address-cells = <1>;
95 #size-cells = <0>;
96
97 port@0 {
98 reg = <0>;
99
100 vga_dac_in: endpoint {
101 remote-endpoint = <&tcon0_out_vga>;
102 };
103 };
104
105 port@1 {
106 reg = <1>;
107
108 vga_dac_out: endpoint {
109 remote-endpoint = <&vga_con_in>;
110 };
111 };
112 };
113 };
114
115 wifi_pwrseq: wifi-pwrseq {
116 compatible = "mmc-pwrseq-simple";
117 clocks = <&ac100_rtc 1>;
118 clock-names = "ext_clock";
119 /* enables internal regulator and de-asserts reset */
120 reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 WL-PMU-EN */
121 };
122 };
123
124 &de {
125 status = "okay";
126 };
127
128 &gmac {
129 pinctrl-names = "default";
130 pinctrl-0 = <&gmac_rgmii_pins>;
131 phy-handle = <&phy1>;
132 phy-mode = "rgmii-id";
133 phy-supply = <®_cldo1>;
134 status = "okay";
135 };
136
137 &i2c3 {
138 pinctrl-names = "default";
139 pinctrl-0 = <&i2c3_pins>;
140 status = "okay";
141 };
142
143 &mdio {
144 phy1: ethernet-phy@1 {
145 reg = <1>;
146 };
147 };
148
149 &mmc0 {
150 pinctrl-names = "default";
151 pinctrl-0 = <&mmc0_pins>;
152 vmmc-supply = <®_dcdc1>;
153 bus-width = <4>;
154 cd-gpios = <&pio 7 18 GPIO_ACTIVE_LOW>; /* PH18 */
155 status = "okay";
156 };
157
158 &mmc1 {
159 pinctrl-names = "default";
160 pinctrl-0 = <&mmc1_pins>;
161 vmmc-supply = <®_dldo1>;
162 vqmmc-supply = <®_cldo3>;
163 mmc-pwrseq = <&wifi_pwrseq>;
164 bus-width = <4>;
165 non-removable;
166 status = "okay";
167 };
168
169 &mmc1_pins {
170 bias-pull-up;
171 };
172
173 &mmc2 {
174 pinctrl-names = "default";
175 pinctrl-0 = <&mmc2_8bit_pins>;
176 vmmc-supply = <®_dcdc1>;
177 bus-width = <8>;
178 non-removable;
179 cap-mmc-hw-reset;
180 status = "okay";
181 };
182
183 &mmc2_8bit_pins {
184 /* Increase drive strength for DDR modes */
185 drive-strength = <40>;
186 };
187
188 &osc32k {
189 /* osc32k input is from AC100 */
190 clocks = <&ac100_rtc 0>;
191 };
192
193 &pio {
194 vcc-pa-supply = <®_ldo_io1>;
195 vcc-pb-supply = <®_aldo2>;
196 vcc-pc-supply = <®_dcdc1>;
197 vcc-pd-supply = <®_dc1sw>;
198 vcc-pe-supply = <®_eldo2>;
199 vcc-pf-supply = <®_dcdc1>;
200 vcc-pg-supply = <®_ldo_io0>;
201 vcc-ph-supply = <®_dcdc1>;
202 };
203
204 &r_ir {
205 status = "okay";
206 };
207
208 &r_pio {
209 vcc-pl-supply = <®_dldo2>;
210 vcc-pm-supply = <®_eldo3>;
211 };
212
213 &r_rsb {
214 status = "okay";
215
216 axp809: pmic@3a3 {
217 reg = <0x3a3>;
218 interrupt-parent = <&nmi_intc>;
219 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
220
221 regulators {
222 reg_aldo1: aldo1 {
223 /*
224 * TODO: This should be handled by the
225 * USB PHY driver.
226 */
227 regulator-always-on;
228 regulator-min-microvolt = <3000000>;
229 regulator-max-microvolt = <3000000>;
230 regulator-name = "vcc33-usbh";
231 };
232
233 reg_aldo2: aldo2 {
234 regulator-min-microvolt = <1800000>;
235 regulator-max-microvolt = <1800000>;
236 regulator-name = "vcc-pb-io-cam";
237 };
238
239 aldo3 {
240 /* unused */
241 };
242
243 reg_dc1sw: dc1sw {
244 regulator-name = "vcc-pd";
245 };
246
247 reg_dc5ldo: dc5ldo {
248 regulator-always-on;
249 regulator-min-microvolt = <800000>;
250 regulator-max-microvolt = <1100000>;
251 regulator-name = "vdd-cpus-09-usbh";
252 };
253
254 reg_dcdc1: dcdc1 {
255 regulator-always-on;
256 regulator-min-microvolt = <3000000>;
257 regulator-max-microvolt = <3000000>;
258 regulator-name = "vcc-3v";
259 };
260
261 reg_dcdc2: dcdc2 {
262 regulator-min-microvolt = <800000>;
263 regulator-max-microvolt = <1100000>;
264 regulator-name = "vdd-gpu";
265 };
266
267 reg_dcdc3: dcdc3 {
268 regulator-always-on;
269 regulator-min-microvolt = <800000>;
270 regulator-max-microvolt = <1100000>;
271 regulator-name = "vdd-cpua";
272 };
273
274 reg_dcdc4: dcdc4 {
275 regulator-always-on;
276 regulator-min-microvolt = <800000>;
277 regulator-max-microvolt = <1100000>;
278 regulator-name = "vdd-sys-usb0-hdmi";
279 };
280
281 reg_dcdc5: dcdc5 {
282 regulator-always-on;
283 regulator-min-microvolt = <1425000>;
284 regulator-max-microvolt = <1575000>;
285 regulator-name = "vcc-dram";
286 };
287
288 reg_dldo1: dldo1 {
289 /*
290 * The WiFi chip supports a wide range
291 * (3.0 ~ 4.8V) of voltages, and so does
292 * this regulator (3.0 ~ 4.2V), but
293 * Allwinner SDK always sets it to 3.3V.
294 */
295 regulator-min-microvolt = <3300000>;
296 regulator-max-microvolt = <3300000>;
297 regulator-name = "vcc-wifi";
298 };
299
300 reg_dldo2: dldo2 {
301 regulator-min-microvolt = <3000000>;
302 regulator-max-microvolt = <3000000>;
303 regulator-name = "vcc-pl";
304 };
305
306 reg_eldo1: eldo1 {
307 regulator-min-microvolt = <1200000>;
308 regulator-max-microvolt = <1200000>;
309 regulator-name = "vcc-dvdd-cam";
310 };
311
312 reg_eldo2: eldo2 {
313 regulator-min-microvolt = <1800000>;
314 regulator-max-microvolt = <1800000>;
315 regulator-name = "vcc-pe";
316 };
317
318 reg_eldo3: eldo3 {
319 regulator-min-microvolt = <3000000>;
320 regulator-max-microvolt = <3000000>;
321 regulator-name = "vcc-pm-codec-io1";
322 };
323
324 reg_ldo_io0: ldo_io0 {
325 regulator-min-microvolt = <3000000>;
326 regulator-max-microvolt = <3000000>;
327 regulator-name = "vcc-pg";
328 };
329
330 reg_ldo_io1: ldo_io1 {
331 regulator-min-microvolt = <2500000>;
332 regulator-max-microvolt = <2500000>;
333 regulator-name = "vcc-pa-gmac-2v5";
334 };
335
336 reg_rtc_ldo: rtc_ldo {
337 regulator-name = "vcc-rtc-vdd1v8-io";
338 };
339
340 sw {
341 /* unused */
342 };
343 };
344 };
345
346 axp806: pmic@745 {
347 compatible = "x-powers,axp806";
348 reg = <0x745>;
349 interrupt-parent = <&nmi_intc>;
350 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
351 interrupt-controller;
352 #interrupt-cells = <1>;
353 bldoin-supply = <®_dcdce>;
354
355 regulators {
356 reg_s_aldo1: aldo1 {
357 regulator-always-on;
358 regulator-min-microvolt = <3000000>;
359 regulator-max-microvolt = <3000000>;
360 regulator-name = "avcc";
361 };
362
363 aldo2 {
364 /*
365 * unused, but use a different name to
366 * avoid name clash with axp809's aldo's
367 */
368 regulator-name = "s_aldo2";
369 };
370
371 aldo3 {
372 /*
373 * unused, but use a different name to
374 * avoid name clash with axp809's aldo's
375 */
376 regulator-name = "s_aldo3";
377 };
378
379 reg_bldo1: bldo1 {
380 regulator-always-on;
381 regulator-min-microvolt = <1700000>;
382 regulator-max-microvolt = <1900000>;
383 regulator-name = "vcc18-efuse-adc-display-csi";
384 };
385
386 reg_bldo2: bldo2 {
387 regulator-always-on;
388 regulator-min-microvolt = <1700000>;
389 regulator-max-microvolt = <1900000>;
390 regulator-name =
391 "vdd18-drampll-vcc18-pll-cpvdd";
392 };
393
394 bldo3 {
395 /* unused */
396 };
397
398 reg_bldo4: bldo4 {
399 regulator-min-microvolt = <1100000>;
400 regulator-max-microvolt = <1300000>;
401 regulator-name = "vcc12-hsic";
402 };
403
404 reg_cldo1: cldo1 {
405 /*
406 * This was 3V in the original design, but
407 * 3.3V is the recommended supply voltage
408 * for the Ethernet PHY.
409 */
410 regulator-min-microvolt = <3300000>;
411 regulator-max-microvolt = <3300000>;
412 /*
413 * The PHY requires 20ms after all voltages
414 * are applied until core logic is ready and
415 * 30ms after the reset pin is de-asserted.
416 * Set a 100ms delay to account for PMIC
417 * ramp time and board traces.
418 */
419 regulator-enable-ramp-delay = <100000>;
420 regulator-name = "vcc-gmac-phy";
421 };
422
423 reg_cldo2: cldo2 {
424 regulator-min-microvolt = <2800000>;
425 regulator-max-microvolt = <2800000>;
426 regulator-name = "afvcc-cam";
427 };
428
429 reg_cldo3: cldo3 {
430 regulator-min-microvolt = <3000000>;
431 regulator-max-microvolt = <3000000>;
432 regulator-name = "vcc-io-wifi-codec-io2";
433 };
434
435 reg_dcdca: dcdca {
436 regulator-always-on;
437 regulator-min-microvolt = <800000>;
438 regulator-max-microvolt = <1100000>;
439 regulator-name = "vdd-cpub";
440 };
441
442 reg_dcdcd: dcdcd {
443 regulator-always-on;
444 regulator-min-microvolt = <800000>;
445 regulator-max-microvolt = <1100000>;
446 regulator-name = "vdd-vpu";
447 };
448
449 reg_dcdce: dcdce {
450 regulator-always-on;
451 regulator-min-microvolt = <2100000>;
452 regulator-max-microvolt = <2100000>;
453 regulator-name = "vcc-bldo-codec-ldoin";
454 };
455
456 sw {
457 /*
458 * unused, but use a different name to
459 * avoid name clash with axp809's sw
460 */
461 regulator-name = "s_sw";
462 };
463 };
464 };
465
466 ac100: codec@e89 {
467 compatible = "x-powers,ac100";
468 reg = <0xe89>;
469
470 ac100_codec: codec {
471 compatible = "x-powers,ac100-codec";
472 interrupt-parent = <&r_pio>;
473 interrupts = <0 9 IRQ_TYPE_LEVEL_LOW>; /* PL9 */
474 #clock-cells = <0>;
475 clock-output-names = "4M_adda";
476 };
477
478 ac100_rtc: rtc {
479 compatible = "x-powers,ac100-rtc";
480 interrupt-parent = <&nmi_intc>;
481 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
482 clocks = <&ac100_codec>;
483 #clock-cells = <1>;
484 clock-output-names = "cko1_rtc",
485 "cko2_rtc",
486 "cko3_rtc";
487 };
488 };
489 };
490
491 #include "axp809.dtsi"
492
493 &tcon0 {
494 pinctrl-names = "default";
495 pinctrl-0 = <&lcd0_rgb888_pins>;
496 };
497
498 &tcon0_out {
499 tcon0_out_vga: endpoint {
500 remote-endpoint = <&vga_dac_in>;
501 };
502 };
503
504 &uart0 {
505 pinctrl-names = "default";
506 pinctrl-0 = <&uart0_ph_pins>;
507 status = "okay";
508 };
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