1 // SPDX-License-Identifier: GPL-2.0-only
2 // Copyright (c) 2022, Ampere Computing LLC
3
4 /dts-v1/;
5
6 #include "aspeed-g6.dtsi"
7 #include <dt-bindings/i2c/i2c.h>
8 #include <dt-bindings/gpio/aspeed-gpio.h>
9
10 / {
11 model = "Ampere Mt.Mitchell BMC";
12 compatible = "ampere,mtmitchell-bmc", "aspeed,ast2600";
13
14 aliases {
15 serial7 = &uart8;
16 serial8 = &uart9;
17
18 /*
19 * I2C NVMe alias port
20 */
21 i2c100 = &backplane_0;
22 i2c48 = &nvmeslot_0;
23 i2c49 = &nvmeslot_1;
24 i2c50 = &nvmeslot_2;
25 i2c51 = &nvmeslot_3;
26 i2c52 = &nvmeslot_4;
27 i2c53 = &nvmeslot_5;
28 i2c54 = &nvmeslot_6;
29 i2c55 = &nvmeslot_7;
30
31 i2c101 = &backplane_1;
32 i2c56 = &nvmeslot_8;
33 i2c57 = &nvmeslot_9;
34 i2c58 = &nvmeslot_10;
35 i2c59 = &nvmeslot_11;
36 i2c60 = &nvmeslot_12;
37 i2c61 = &nvmeslot_13;
38 i2c62 = &nvmeslot_14;
39 i2c63 = &nvmeslot_15;
40
41 i2c102 = &backplane_2;
42 i2c64 = &nvmeslot_16;
43 i2c65 = &nvmeslot_17;
44 i2c66 = &nvmeslot_18;
45 i2c67 = &nvmeslot_19;
46 i2c68 = &nvmeslot_20;
47 i2c69 = &nvmeslot_21;
48 i2c70 = &nvmeslot_22;
49 i2c71 = &nvmeslot_23;
50
51 i2c80 = &nvme_m2_0;
52 i2c81 = &nvme_m2_1;
53 };
54
55 chosen {
56 stdout-path = &uart5;
57 };
58
59 memory@80000000 {
60 device_type = "memory";
61 reg = <0x80000000 0x80000000>;
62 };
63
64 reserved-memory {
65 #address-cells = <1>;
66 #size-cells = <1>;
67 ranges;
68
69 gfx_memory: framebuffer {
70 size = <0x01000000>;
71 alignment = <0x01000000>;
72 compatible = "shared-dma-pool";
73 reusable;
74 };
75
76 video_engine_memory: video {
77 size = <0x04000000>;
78 alignment = <0x01000000>;
79 compatible = "shared-dma-pool";
80 reusable;
81 };
82
83 vga_memory: region@bf000000 {
84 no-map;
85 compatible = "shared-dma-pool";
86 reg = <0xbf000000 0x01000000>; /* 16M */
87 };
88 };
89
90 voltage_mon_reg: voltage-mon-regulator {
91 compatible = "regulator-fixed";
92 regulator-name = "ltc2497_reg";
93 regulator-min-microvolt = <3300000>;
94 regulator-max-microvolt = <3300000>;
95 regulator-always-on;
96 };
97
98 gpioI5mux: mux-controller {
99 compatible = "gpio-mux";
100 #mux-control-cells = <0>;
101 mux-gpios = <&gpio0 ASPEED_GPIO(I, 5) GPIO_ACTIVE_HIGH>;
102 };
103
104 adc0mux: adc0mux {
105 compatible = "io-channel-mux";
106 io-channels = <&adc_i2c_0 0>;
107 #io-channel-cells = <1>;
108 io-channel-names = "parent";
109 mux-controls = <&gpioI5mux>;
110 settle-time-us = <10000>;
111 channels = "s0", "s1";
112 };
113
114 adc1mux: adc1mux {
115 compatible = "io-channel-mux";
116 io-channels = <&adc_i2c_0 1>;
117 #io-channel-cells = <1>;
118 io-channel-names = "parent";
119 mux-controls = <&gpioI5mux>;
120 settle-time-us = <10000>;
121 channels = "s0", "s1";
122 };
123
124 adc2mux: adc2mux {
125 compatible = "io-channel-mux";
126 io-channels = <&adc_i2c_0 2>;
127 #io-channel-cells = <1>;
128 io-channel-names = "parent";
129 mux-controls = <&gpioI5mux>;
130 settle-time-us = <10000>;
131 channels = "s0", "s1";
132 };
133
134 adc3mux: adc3mux {
135 compatible = "io-channel-mux";
136 io-channels = <&adc_i2c_0 3>;
137 #io-channel-cells = <1>;
138 io-channel-names = "parent";
139 mux-controls = <&gpioI5mux>;
140 settle-time-us = <10000>;
141 channels = "s0", "s1";
142 };
143
144 adc4mux: adc4mux {
145 compatible = "io-channel-mux";
146 io-channels = <&adc_i2c_0 4>;
147 #io-channel-cells = <1>;
148 io-channel-names = "parent";
149 mux-controls = <&gpioI5mux>;
150 settle-time-us = <10000>;
151 channels = "s0", "s1";
152 };
153
154 adc5mux: adc5mux {
155 compatible = "io-channel-mux";
156 io-channels = <&adc_i2c_0 5>;
157 #io-channel-cells = <1>;
158 io-channel-names = "parent";
159 mux-controls = <&gpioI5mux>;
160 settle-time-us = <10000>;
161 channels = "s0", "s1";
162 };
163
164 adc6mux: adc6mux {
165 compatible = "io-channel-mux";
166 io-channels = <&adc_i2c_0 6>;
167 #io-channel-cells = <1>;
168 io-channel-names = "parent";
169 mux-controls = <&gpioI5mux>;
170 settle-time-us = <10000>;
171 channels = "s0", "s1";
172 };
173
174 adc7mux: adc7mux {
175 compatible = "io-channel-mux";
176 io-channels = <&adc_i2c_0 7>;
177 #io-channel-cells = <1>;
178 io-channel-names = "parent";
179 mux-controls = <&gpioI5mux>;
180 settle-time-us = <10000>;
181 channels = "s0", "s1";
182 };
183
184 adc8mux: adc8mux {
185 compatible = "io-channel-mux";
186 io-channels = <&adc_i2c_0 8>;
187 #io-channel-cells = <1>;
188 io-channel-names = "parent";
189 mux-controls = <&gpioI5mux>;
190 settle-time-us = <10000>;
191 channels = "s0", "s1";
192 };
193
194 adc9mux: adc9mux {
195 compatible = "io-channel-mux";
196 io-channels = <&adc_i2c_0 9>;
197 #io-channel-cells = <1>;
198 io-channel-names = "parent";
199 mux-controls = <&gpioI5mux>;
200 settle-time-us = <10000>;
201 channels = "s0", "s1";
202 };
203
204 adc10mux: adc10mux {
205 compatible = "io-channel-mux";
206 io-channels = <&adc_i2c_0 10>;
207 #io-channel-cells = <1>;
208 io-channel-names = "parent";
209 mux-controls = <&gpioI5mux>;
210 settle-time-us = <10000>;
211 channels = "s0", "s1";
212 };
213
214 adc11mux: adc11mux {
215 compatible = "io-channel-mux";
216 io-channels = <&adc_i2c_0 11>;
217 #io-channel-cells = <1>;
218 io-channel-names = "parent";
219 mux-controls = <&gpioI5mux>;
220 settle-time-us = <10000>;
221 channels = "s0", "s1";
222 };
223
224 adc12mux: adc12mux {
225 compatible = "io-channel-mux";
226 io-channels = <&adc_i2c_0 12>;
227 #io-channel-cells = <1>;
228 io-channel-names = "parent";
229 mux-controls = <&gpioI5mux>;
230 settle-time-us = <10000>;
231 channels = "s0", "s1";
232 };
233
234 adc13mux: adc13mux {
235 compatible = "io-channel-mux";
236 io-channels = <&adc_i2c_0 13>;
237 #io-channel-cells = <1>;
238 io-channel-names = "parent";
239 mux-controls = <&gpioI5mux>;
240 settle-time-us = <10000>;
241 channels = "s0", "s1";
242 };
243
244 adc14mux: adc14mux {
245 compatible = "io-channel-mux";
246 io-channels = <&adc_i2c_0 14>;
247 #io-channel-cells = <1>;
248 io-channel-names = "parent";
249 mux-controls = <&gpioI5mux>;
250 settle-time-us = <10000>;
251 channels = "s0", "s1";
252 };
253
254 adc15mux: adc15mux {
255 compatible = "io-channel-mux";
256 io-channels = <&adc_i2c_0 15>;
257 #io-channel-cells = <1>;
258 io-channel-names = "parent";
259 mux-controls = <&gpioI5mux>;
260 settle-time-us = <10000>;
261 channels = "s0", "s1";
262 };
263
264 iio-hwmon {
265 compatible = "iio-hwmon";
266 io-channels = <&adc0mux 0>, <&adc0mux 1>,
267 <&adc1mux 0>, <&adc1mux 1>,
268 <&adc2mux 0>, <&adc2mux 1>,
269 <&adc3mux 0>, <&adc3mux 1>,
270 <&adc4mux 0>, <&adc4mux 1>,
271 <&adc5mux 0>, <&adc5mux 1>,
272 <&adc6mux 0>, <&adc6mux 1>,
273 <&adc7mux 0>, <&adc7mux 1>,
274 <&adc8mux 0>, <&adc8mux 1>,
275 <&adc9mux 0>, <&adc9mux 1>,
276 <&adc10mux 0>, <&adc10mux 1>,
277 <&adc11mux 0>, <&adc11mux 1>,
278 <&adc12mux 0>, <&adc12mux 1>,
279 <&adc13mux 0>, <&adc13mux 1>,
280 <&adc14mux 0>, <&adc14mux 1>,
281 <&adc15mux 0>, <&adc15mux 1>,
282 <&adc_i2c_1 0>, <&adc_i2c_1 1>,
283 <&adc_i2c_1 2>, <&adc_i2c_1 3>,
284 <&adc_i2c_1 4>, <&adc_i2c_1 5>,
285 <&adc_i2c_1 6>, <&adc_i2c_1 7>,
286 <&adc_i2c_1 8>, <&adc_i2c_1 9>,
287 <&adc_i2c_1 10>, <&adc_i2c_1 11>,
288 <&adc_i2c_1 12>, <&adc_i2c_1 13>,
289 <&adc_i2c_1 14>, <&adc_i2c_1 15>,
290 <&adc0 0>, <&adc0 1>,
291 <&adc0 2>;
292 };
293 };
294
295 &mdio0 {
296 status = "okay";
297
298 ethphy0: ethernet-phy@0 {
299 compatible = "ethernet-phy-ieee802.3-c22";
300 reg = <0>;
301 };
302 };
303
304 &mac0 {
305 status = "okay";
306
307 phy-mode = "rgmii";
308 phy-handle = <ðphy0>;
309
310 pinctrl-names = "default";
311 pinctrl-0 = <&pinctrl_rgmii1_default>;
312 };
313
314 &mac3 {
315 status = "okay";
316 pinctrl-names = "default";
317 pinctrl-0 = <&pinctrl_rmii4_default>;
318 clock-names = "MACCLK", "RCLK";
319 use-ncsi;
320 };
321
322 &fmc {
323 status = "okay";
324 flash@0 {
325 status = "okay";
326 m25p,fast-read;
327 label = "bmc";
328 spi-max-frequency = <50000000>;
329 #include "openbmc-flash-layout-64.dtsi"
330 };
331
332 flash@1 {
333 status = "okay";
334 m25p,fast-read;
335 label = "alt-bmc";
336 spi-max-frequency = <50000000>;
337 #include "openbmc-flash-layout-64-alt.dtsi"
338 };
339 };
340
341 &spi1 {
342 status = "okay";
343 pinctrl-names = "default";
344 pinctrl-0 = <&pinctrl_spi1_default>;
345
346 flash@0 {
347 status = "okay";
348 m25p,fast-read;
349 label = "pnor";
350 spi-max-frequency = <20000000>;
351 };
352 };
353
354 &uart1 {
355 status = "okay";
356 };
357
358 &uart2 {
359 status = "okay";
360 };
361
362 &uart3 {
363 status = "okay";
364 };
365
366 &uart4 {
367 status = "okay";
368 };
369
370 &uart8 {
371 status = "okay";
372 };
373
374 &uart9 {
375 status = "okay";
376 };
377
378 &i2c0 {
379 status = "okay";
380
381 temperature-sensor@2e {
382 compatible = "adi,adt7490";
383 reg = <0x2e>;
384 };
385 };
386
387 &i2c1 {
388 status = "okay";
389 };
390
391 &i2c2 {
392 status = "okay";
393
394 psu@58 {
395 compatible = "pmbus";
396 reg = <0x58>;
397 };
398
399 psu@59 {
400 compatible = "pmbus";
401 reg = <0x59>;
402 };
403 };
404
405 &i2c3 {
406 status = "okay";
407 bus-frequency = <1000000>;
408 multi-master;
409 mctp-controller;
410
411 mctp@10 {
412 compatible = "mctp-i2c-controller";
413 reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
414 };
415 };
416
417 &i2c4 {
418 status = "okay";
419
420 adc_i2c_0: adc@14 {
421 compatible = "lltc,ltc2497";
422 reg = <0x14>;
423 vref-supply = <&voltage_mon_reg>;
424 #io-channel-cells = <1>;
425 };
426
427 adc_i2c_1: adc@16 {
428 compatible = "lltc,ltc2497";
429 reg = <0x16>;
430 vref-supply = <&voltage_mon_reg>;
431 #io-channel-cells = <1>;
432 };
433
434 eeprom@50 {
435 compatible = "atmel,24c64";
436 reg = <0x50>;
437 pagesize = <32>;
438 };
439
440 i2c-mux@70 {
441 compatible = "nxp,pca9545";
442 #address-cells = <1>;
443 #size-cells = <0>;
444 reg = <0x70>;
445 i2c-mux-idle-disconnect;
446
447 i2c4_bus70_chn0: i2c@0 {
448 #address-cells = <1>;
449 #size-cells = <0>;
450 reg = <0x0>;
451
452 outlet_temp1: temperature-sensor@48 {
453 compatible = "ti,tmp75";
454 reg = <0x48>;
455 };
456 psu1_inlet_temp2: temperature-sensor@49 {
457 compatible = "ti,tmp75";
458 reg = <0x49>;
459 };
460 };
461
462 i2c4_bus70_chn1: i2c@1 {
463 #address-cells = <1>;
464 #size-cells = <0>;
465 reg = <0x1>;
466
467 pcie_zone_temp1: temperature-sensor@48 {
468 compatible = "ti,tmp75";
469 reg = <0x48>;
470 };
471 psu0_inlet_temp2: temperature-sensor@49 {
472 compatible = "ti,tmp75";
473 reg = <0x49>;
474 };
475 };
476
477 i2c4_bus70_chn2: i2c@2 {
478 #address-cells = <1>;
479 #size-cells = <0>;
480 reg = <0x2>;
481
482 pcie_zone_temp2: temperature-sensor@48 {
483 compatible = "ti,tmp75";
484 reg = <0x48>;
485 };
486 outlet_temp2: temperature-sensor@49 {
487 compatible = "ti,tmp75";
488 reg = <0x49>;
489 };
490 };
491
492 i2c4_bus70_chn3: i2c@3 {
493 #address-cells = <1>;
494 #size-cells = <0>;
495 reg = <0x3>;
496
497 mb_inlet_temp1: temperature-sensor@7c {
498 compatible = "microchip,emc1413";
499 reg = <0x7c>;
500 };
501 mb_inlet_temp2: temperature-sensor@4c {
502 compatible = "microchip,emc1413";
503 reg = <0x4c>;
504 };
505 };
506 };
507 };
508
509 &i2c5 {
510 status = "okay";
511
512 i2c-mux@70 {
513 compatible = "nxp,pca9548";
514 #address-cells = <1>;
515 #size-cells = <0>;
516 reg = <0x70>;
517 i2c-mux-idle-disconnect;
518 };
519 };
520
521 &i2c6 {
522 status = "okay";
523 rtc@51 {
524 compatible = "nxp,pcf85063a";
525 reg = <0x51>;
526 };
527 };
528
529 &i2c7 {
530 status = "okay";
531 };
532
533 &i2c8 {
534 status = "okay";
535
536 temperature-sensor@48 {
537 compatible = "ti,tmp112";
538 reg = <0x48>;
539 };
540
541 gpio@77 {
542 compatible = "nxp,pca9539";
543 reg = <0x77>;
544 gpio-controller;
545 #address-cells = <1>;
546 #size-cells = <0>;
547 #gpio-cells = <2>;
548
549 bmc-ocp0-en-hog {
550 gpio-hog;
551 gpios = <7 GPIO_ACTIVE_LOW>;
552 output-high;
553 line-name = "bmc-ocp0-en-n";
554 };
555 };
556 };
557
558 &i2c9 {
559 status = "okay";
560 i2c-mux@70 {
561 compatible = "nxp,pca9548";
562 #address-cells = <1>;
563 #size-cells = <0>;
564 reg = <0x70>;
565 i2c-mux-idle-disconnect;
566
567 backplane_1: i2c@0 {
568 #address-cells = <1>;
569 #size-cells = <0>;
570 reg = <0x0>;
571
572 eeprom@50 {
573 compatible = "atmel,24c64";
574 reg = <0x50>;
575 pagesize = <32>;
576 };
577
578 i2c-mux@71 {
579 compatible = "nxp,pca9548";
580 #address-cells = <1>;
581 #size-cells = <0>;
582 reg = <0x71>;
583 i2c-mux-idle-disconnect;
584
585 nvmeslot_8: i2c@0 {
586 #address-cells = <1>;
587 #size-cells = <0>;
588 reg = <0x0>;
589 };
590 nvmeslot_9: i2c@1 {
591 #address-cells = <1>;
592 #size-cells = <0>;
593 reg = <0x1>;
594 };
595 nvmeslot_10: i2c@2 {
596 #address-cells = <1>;
597 #size-cells = <0>;
598 reg = <0x2>;
599 };
600 nvmeslot_11: i2c@3 {
601 #address-cells = <1>;
602 #size-cells = <0>;
603 reg = <0x3>;
604 };
605 nvmeslot_12: i2c@4 {
606 #address-cells = <1>;
607 #size-cells = <0>;
608 reg = <0x4>;
609 };
610 nvmeslot_13: i2c@5 {
611 #address-cells = <1>;
612 #size-cells = <0>;
613 reg = <0x5>;
614 };
615 nvmeslot_14: i2c@6 {
616 #address-cells = <1>;
617 #size-cells = <0>;
618 reg = <0x6>;
619 };
620 nvmeslot_15: i2c@7 {
621 #address-cells = <1>;
622 #size-cells = <0>;
623 reg = <0x7>;
624 };
625 };
626
627 tmp432@4c {
628 compatible = "ti,tmp75";
629 reg = <0x4c>;
630 };
631 };
632
633 backplane_2: i2c@2 {
634 #address-cells = <1>;
635 #size-cells = <0>;
636 reg = <0x2>;
637
638 eeprom@50 {
639 compatible = "atmel,24c64";
640 reg = <0x50>;
641 pagesize = <32>;
642 };
643
644 i2c-mux@71 {
645 compatible = "nxp,pca9548";
646 #address-cells = <1>;
647 #size-cells = <0>;
648 reg = <0x71>;
649 i2c-mux-idle-disconnect;
650
651 nvmeslot_16: i2c@0 {
652 #address-cells = <1>;
653 #size-cells = <0>;
654 reg = <0x0>;
655 };
656 nvmeslot_17: i2c@1 {
657 #address-cells = <1>;
658 #size-cells = <0>;
659 reg = <0x1>;
660 };
661 nvmeslot_18: i2c@2 {
662 #address-cells = <1>;
663 #size-cells = <0>;
664 reg = <0x2>;
665 };
666 nvmeslot_19: i2c@3 {
667 #address-cells = <1>;
668 #size-cells = <0>;
669 reg = <0x3>;
670 };
671 nvmeslot_20: i2c@4 {
672 #address-cells = <1>;
673 #size-cells = <0>;
674 reg = <0x4>;
675 };
676 nvmeslot_21: i2c@5 {
677 #address-cells = <1>;
678 #size-cells = <0>;
679 reg = <0x5>;
680 };
681 nvmeslot_22: i2c@6 {
682 #address-cells = <1>;
683 #size-cells = <0>;
684 reg = <0x6>;
685 };
686 nvmeslot_23: i2c@7 {
687 #address-cells = <1>;
688 #size-cells = <0>;
689 reg = <0x7>;
690 };
691 };
692
693 tmp432@4c {
694 compatible = "ti,tmp75";
695 reg = <0x4c>;
696 };
697 };
698
699 backplane_0: i2c@4 {
700 #address-cells = <1>;
701 #size-cells = <0>;
702 reg = <0x4>;
703
704 eeprom@50 {
705 compatible = "atmel,24c64";
706 reg = <0x50>;
707 pagesize = <32>;
708 };
709
710 i2c-mux@71 {
711 compatible = "nxp,pca9548";
712 #address-cells = <1>;
713 #size-cells = <0>;
714 reg = <0x71>;
715 i2c-mux-idle-disconnect;
716
717 nvmeslot_0: i2c@0 {
718 #address-cells = <1>;
719 #size-cells = <0>;
720 reg = <0x0>;
721 };
722 nvmeslot_1: i2c@1 {
723 #address-cells = <1>;
724 #size-cells = <0>;
725 reg = <0x1>;
726 };
727 nvmeslot_2: i2c@2 {
728 #address-cells = <1>;
729 #size-cells = <0>;
730 reg = <0x2>;
731 };
732 nvmeslot_3: i2c@3 {
733 #address-cells = <1>;
734 #size-cells = <0>;
735 reg = <0x3>;
736 };
737 nvmeslot_4: i2c@4 {
738 #address-cells = <1>;
739 #size-cells = <0>;
740 reg = <0x4>;
741 };
742 nvmeslot_5: i2c@5 {
743 #address-cells = <1>;
744 #size-cells = <0>;
745 reg = <0x5>;
746 };
747 nvmeslot_6: i2c@6 {
748 #address-cells = <1>;
749 #size-cells = <0>;
750 reg = <0x6>;
751 };
752 nvmeslot_7: i2c@7 {
753 #address-cells = <1>;
754 #size-cells = <0>;
755 reg = <0x7>;
756 };
757 };
758
759 tmp432@4c {
760 compatible = "ti,tmp75";
761 reg = <0x4c>;
762 };
763 };
764
765 i2c@7 {
766 #address-cells = <1>;
767 #size-cells = <0>;
768 reg = <0x7>;
769
770 i2c-mux@71 {
771 compatible = "nxp,pca9546";
772 #address-cells = <1>;
773 #size-cells = <0>;
774 reg = <0x71>;
775 i2c-mux-idle-disconnect;
776
777 nvme_m2_0: i2c@0 {
778 #address-cells = <1>;
779 #size-cells = <0>;
780 reg = <0x0>;
781 };
782
783 nvme_m2_1: i2c@1 {
784 #address-cells = <1>;
785 #size-cells = <0>;
786 reg = <0x1>;
787 };
788 };
789 };
790 };
791 };
792
793 &i2c11 {
794 status = "okay";
795 ssif-bmc@10 {
796 compatible = "ssif-bmc";
797 reg = <0x10>;
798 };
799 };
800
801 &i2c14 {
802 status = "okay";
803 eeprom@50 {
804 compatible = "atmel,24c64";
805 reg = <0x50>;
806 pagesize = <32>;
807 };
808
809 bmc_ast2600_cpu: temperature-sensor@35 {
810 compatible = "ti,tmp175";
811 reg = <0x35>;
812 };
813 };
814
815 &adc0 {
816 status = "okay";
817
818 pinctrl-names = "default";
819 pinctrl-0 = <&pinctrl_adc0_default &pinctrl_adc1_default
820 &pinctrl_adc2_default>;
821 };
822
823 &vhub {
824 status = "okay";
825 };
826
827 &video {
828 status = "okay";
829 memory-region = <&video_engine_memory>;
830 };
831
832 &gpio0 {
833 gpio-line-names =
834 /*A0-A7*/ "","","","","","i2c2-reset-n","i2c6-reset-n","i2c4-reset-n",
835 /*B0-B7*/ "","","","","host0-sysreset-n","host0-pmin-n","","",
836 /*C0-C7*/ "s0-vrd-fault-n","s1-vrd-fault-n","bmc-debug-mode","",
837 "irq-n","","vrd-sel","spd-sel",
838 /*D0-D7*/ "presence-ps0","presence-ps1","hsc-12vmain-alt2-n","ext-high-temp-n",
839 "","bmc-ncsi-txen","","",
840 /*E0-E7*/ "","eth-phy-int-n","clk50m-bmc-ncsi","","","","","",
841 /*F0-F7*/ "s0-pcp-oc-warn-n","s1-pcp-oc-warn-n","power-chassis-control",
842 "cpu-bios-recover","s0-heartbeat","hs-csout-prochot",
843 "s0-vr-hot-n","s1-vr-hot-n",
844 /*G0-G7*/ "","","hsc-12vmain-alt1-n","","","","","",
845 /*H0-H7*/ "jtag-program-sel","fpga-program-b","wd-disable-n",
846 "power-chassis-good","","","","",
847 /*I0-I7*/ "","","","","","adc-sw","power-button","rtc-battery-voltage-read-enable",
848 /*J0-J7*/ "","","","","","","","",
849 /*K0-K7*/ "","","","","","","","",
850 /*L0-L7*/ "","","","","","","","",
851 /*M0-M7*/ "","s0-ddr-save","soc-spi-nor-access","presence-cpu0",
852 "s0-rtc-lock","","","",
853 /*N0-N7*/ "hpm-fw-recovery","hpm-stby-rst-n","jtag-sel-s0","led-sw-hb",
854 "jtag-dbgr-prsnt-n","s1-heartbeat","","",
855 /*O0-O7*/ "","","","","","","","",
856 /*P0-P7*/ "ps0-ac-loss-n","ps1-ac-loss-n","","",
857 "led-fault","cpld-user-mode","jtag-srst-n","led-bmc-hb",
858 /*Q0-Q7*/ "","","","","","","","",
859 /*R0-R7*/ "","","","","","","","",
860 /*S0-S7*/ "","","identify-button","led-identify",
861 "s1-ddr-save","spi-nor-access","host0-ready","presence-cpu1",
862 /*T0-T7*/ "","","","","","","","",
863 /*U0-U7*/ "","","","","","","","",
864 /*V0-V7*/ "s0-hightemp-n","s0-fault-alert","s0-sys-auth-failure-n",
865 "host0-reboot-ack-n","s0-fw-boot-ok","host0-shd-req-n",
866 "host0-shd-ack-n","s0-overtemp-n",
867 /*W0-W7*/ "ocp-aux-pwren","ocp-main-pwren","ocp-pgood","s1-pcp-pgood",
868 "bmc-ok","bmc-ready","spi0-program-sel","spi0-backup-sel",
869 /*X0-X7*/ "i2c-backup-sel","s1-fault-alert","s1-fw-boot-ok",
870 "s1-hightemp-n","s0-spi-auth-fail-n","s1-sys-auth-failure-n",
871 "s1-overtemp-n","cpld-s1-spi-auth-fail-n",
872 /*Y0-Y7*/ "","","","","","","","host0-special-boot",
873 /*Z0-Z7*/ "reset-button","ps0-pgood","ps1-pgood","","","","","";
874
875 ocp-aux-pwren-hog {
876 gpio-hog;
877 gpios = <ASPEED_GPIO(W, 0) GPIO_ACTIVE_HIGH>;
878 output-high;
879 line-name = "ocp-aux-pwren";
880 };
881 };
882
883 &gpio1 {
884 gpio-line-names =
885 /*18A0-18A7*/ "","","","","","","","",
886 /*18B0-18B7*/ "","","","","","","s0-soc-pgood","",
887 /*18C0-18C7*/ "uart1-mode0","uart1-mode1","uart2-mode0","uart2-mode1",
888 "uart3-mode0","uart3-mode1","uart4-mode0","uart4-mode1",
889 /*18D0-18D7*/ "","","","","","","","",
890 /*18E0-18E3*/ "","","","";
891 };
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