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TOMOYO Linux Cross Reference
Linux/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-x570d4u.dts

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  1 // SPDX-License-Identifier: GPL-2.0+
  2 /dts-v1/;
  3 #include "aspeed-g5.dtsi"
  4 #include <dt-bindings/gpio/aspeed-gpio.h>
  5 #include <dt-bindings/leds/common.h>
  6 
  7 / {
  8         model = "Asrock Rack X570D4U BMC";
  9         compatible = "asrock,x570d4u-bmc", "aspeed,ast2500";
 10 
 11         aliases {
 12                 i2c40 = &i2c4mux0ch0;
 13                 i2c41 = &i2c4mux0ch1;
 14                 i2c42 = &i2c4mux0ch2;
 15                 i2c43 = &i2c4mux0ch3;
 16         };
 17 
 18         chosen {
 19                 stdout-path = &uart5;
 20         };
 21 
 22         memory@80000000 {
 23                 reg = <0x80000000 0x20000000>;
 24         };
 25 
 26         reserved-memory {
 27                 #address-cells = <1>;
 28                 #size-cells = <1>;
 29                 ranges;
 30 
 31                 pci_memory: region@9a000000 {
 32                         no-map;
 33                         reg = <0x9a000000 0x00010000>; /* 64K */
 34                 };
 35 
 36                 video_engine_memory: jpegbuffer {
 37                         size = <0x02800000>;    /* 40M */
 38                         alignment = <0x01000000>;
 39                         compatible = "shared-dma-pool";
 40                         reusable;
 41                 };
 42 
 43                 gfx_memory: framebuffer {
 44                         size = <0x01000000>;
 45                         alignment = <0x01000000>;
 46                         compatible = "shared-dma-pool";
 47                         reusable;
 48                 };
 49         };
 50 
 51         leds {
 52                 compatible = "gpio-leds";
 53 
 54                 led-0 {
 55                         /* led-heartbeat-n */
 56                         gpios = <&gpio ASPEED_GPIO(H, 6) GPIO_ACTIVE_LOW>;
 57                         color = <LED_COLOR_ID_GREEN>;
 58                         function = LED_FUNCTION_HEARTBEAT;
 59                         linux,default-trigger = "timer";
 60                 };
 61 
 62                 led-1 {
 63                         /* led-fault-n */
 64                         gpios = <&gpio ASPEED_GPIO(Z, 2) GPIO_ACTIVE_LOW>;
 65                         color = <LED_COLOR_ID_AMBER>;
 66                         function = LED_FUNCTION_FAULT;
 67                         panic-indicator;
 68                 };
 69         };
 70 
 71         iio-hwmon {
 72                 compatible = "iio-hwmon";
 73                 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, <&adc 4>,
 74                         <&adc 5>, <&adc 6>, <&adc 7>, <&adc 8>, <&adc 9>,
 75                         <&adc 10>, <&adc 11>, <&adc 12>;
 76         };
 77 };
 78 
 79 &gpio {
 80         status = "okay";
 81         gpio-line-names =
 82         /*  A */ "input-locatorled-n", "", "", "", "", "", "", "",
 83         /*  B */ "input-bios-post-cmplt-n", "", "", "", "", "", "", "",
 84         /*  C */ "", "", "", "", "", "", "control-locatorbutton-n", "",
 85         /*  D */ "button-power-n", "control-power-n", "button-reset-n",
 86                  "control-reset-n", "", "", "", "",
 87         /*  E */ "", "", "", "", "", "", "", "",
 88         /*  F */ "", "", "", "", "", "", "", "",
 89         /*  G */ "output-hwm-vbat-enable", "input-id0-n", "input-id1-n",
 90                  "input-id2-n", "input-aux-smb-alert-n", "",
 91                  "input-psu-smb-alert-n", "",
 92         /*  H */ "", "", "", "", "input-mfg-mode-n", "",
 93                  "led-heartbeat-n", "input-case-open-n",
 94         /*  I */ "", "", "", "", "", "", "", "",
 95         /*  J */ "output-bmc-ready-n", "", "", "", "", "", "", "",
 96         /*  K */ "", "", "", "", "", "", "", "",
 97         /*  L */ "", "", "", "", "", "", "", "",
 98         /*  M */ "", "", "", "", "", "", "", "",
 99         /*  N */ "", "", "", "", "", "", "", "",
100         /*  O */ "", "", "", "", "", "", "", "",
101         /*  P */ "", "", "", "", "", "", "", "",
102         /*  Q */ "", "", "", "", "input-bmc-smb-present-n", "", "",
103                  "input-pcie-wake-n",
104         /*  R */ "", "", "", "", "", "", "", "",
105         /*  S */ "input-bmc-pchhot-n", "", "", "", "", "", "", "",
106         /*  T */ "", "", "", "", "", "", "", "",
107         /*  U */ "", "", "", "", "", "", "", "",
108         /*  V */ "", "", "", "", "", "", "", "",
109         /*  W */ "", "", "", "", "", "", "", "",
110         /*  X */ "", "", "", "", "", "", "", "",
111         /*  Y */ "input-sleep-s3-n", "input-sleep-s5-n", "", "", "", "",
112                  "", "",
113         /*  Z */ "", "", "led-fault-n", "output-bmc-throttle-n", "", "",
114                  "", "",
115         /* AA */ "input-cpu1-thermtrip-latch-n", "",
116                  "input-cpu1-prochot-n", "", "", "", "", "",
117         /* AB */ "", "input-power-good", "", "", "", "", "", "",
118         /* AC */ "", "", "", "", "", "", "", "";
119 };
120 
121 &fmc {
122         status = "okay";
123         flash@0 {
124                 status = "okay";
125                 label = "bmc";
126                 m25p,fast-read;
127                 spi-max-frequency = <10000000>;
128 #include "openbmc-flash-layout-64.dtsi"
129         };
130 };
131 
132 &uart5 {
133         status = "okay";
134 };
135 
136 &vuart {
137         status = "okay";
138 };
139 
140 &mac0 {
141         status = "okay";
142         pinctrl-names = "default";
143         pinctrl-0 = <&pinctrl_rgmii1_default &pinctrl_mdio1_default>;
144 
145         nvmem-cells = <&eth0_macaddress>;
146         nvmem-cell-names = "mac-address";
147 };
148 
149 &mac1 {
150         status = "okay";
151         pinctrl-names = "default";
152         pinctrl-0 = <&pinctrl_rmii2_default &pinctrl_mdio2_default>;
153         use-ncsi;
154 
155         nvmem-cells = <&eth1_macaddress>;
156         nvmem-cell-names = "mac-address";
157 };
158 
159 &i2c0 {
160         /* SMBus on auxiliary panel header (AUX_PANEL1) */
161         status = "okay";
162 };
163 
164 &i2c1 {
165         /* Hardware monitoring SMBus */
166         status = "okay";
167 
168         w83773g@4c {
169                 compatible = "nuvoton,w83773g";
170                 reg = <0x4c>;
171         };
172 };
173 
174 &i2c2 {
175         /* PSU SMBus (PSU_SMB1) */
176         status = "okay";
177 };
178 
179 &i2c3 {
180         status = "okay";
181 };
182 
183 &i2c4 {
184         status = "okay";
185 
186         i2c-mux@70 {
187                 compatible = "nxp,pca9545";
188                 reg = <0x70>;
189                 #address-cells = <1>;
190                 #size-cells = <0>;
191 
192                 i2c4mux0ch0: i2c@0 {
193                         /* SMBus on PCI express 16x slot */
194                         #address-cells = <1>;
195                         #size-cells = <0>;
196                         reg = <0>;
197                 };
198 
199                 i2c4mux0ch1: i2c@1 {
200                         /* SMBus on PCI express 8x slot */
201                         #address-cells = <1>;
202                         #size-cells = <0>;
203                         reg = <1>;
204                 };
205 
206                 i2c4mux0ch2: i2c@2 {
207                         /* Unknown */
208                         #address-cells = <1>;
209                         #size-cells = <0>;
210                         reg = <2>;
211                 };
212 
213                 i2c4mux0ch3: i2c@3 {
214                         /* SMBus on PCI express 1x slot */
215                         #address-cells = <1>;
216                         #size-cells = <0>;
217                         reg = <3>;
218                 };
219         };
220 };
221 
222 &i2c5 {
223         /* SMBus on BMC connector (BMC_SMB_1) */
224         status = "okay";
225 };
226 
227 &i2c7 {
228         /* FRU and SPD EEPROM SMBus */
229         status = "okay";
230 
231         eeprom@57 {
232                 compatible = "st,24c128", "atmel,24c128";
233                 reg = <0x57>;
234                 pagesize = <16>;
235                 #address-cells = <1>;
236                 #size-cells = <1>;
237 
238                 eth0_macaddress: macaddress@3f80 {
239                         reg = <0x3f80 6>;
240                 };
241 
242                 eth1_macaddress: macaddress@3f88 {
243                         reg = <0x3f88 6>;
244                 };
245         };
246 };
247 
248 &i2c8 {
249         /* SMBus on intelligent platform management bus header (IPMB_1) */
250         status = "okay";
251 };
252 
253 &gfx {
254         status = "okay";
255 };
256 
257 &pinctrl {
258         aspeed,external-nodes = <&gfx &lhc>;
259 };
260 
261 &vhub {
262         status = "okay";
263 };
264 
265 &ehci1 {
266         status = "okay";
267 };
268 
269 &uhci {
270         status = "okay";
271 };
272 
273 &kcs3 {
274         aspeed,lpc-io-reg = <0xca2>;
275         status = "okay";
276 };
277 
278 &lpc_ctrl {
279         status = "okay";
280 };
281 
282 &lpc_snoop {
283         status = "okay";
284         snoop-ports = <0x80>;
285 };
286 
287 &p2a {
288         status = "okay";
289         memory-region = <&pci_memory>;
290 };
291 
292 &video {
293         status = "okay";
294         memory-region = <&video_engine_memory>;
295 };
296 
297 &pwm_tacho {
298         status = "okay";
299         pinctrl-names = "default";
300         pinctrl-0 = <&pinctrl_pwm0_default
301                                 &pinctrl_pwm1_default
302                                 &pinctrl_pwm2_default
303                                 &pinctrl_pwm3_default
304                                 &pinctrl_pwm4_default
305                                 &pinctrl_pwm5_default>;
306 
307         fan@0 {
308                 /* FAN1 (4-pin) */
309                 reg = <0x00>;
310                 aspeed,fan-tach-ch = /bits/ 8 <0x00>;
311         };
312 
313         fan@1 {
314                 /* FAN2 (4-pin) */
315                 reg = <0x01>;
316                 aspeed,fan-tach-ch = /bits/ 8 <0x01>;
317         };
318 
319         fan@2 {
320                 /* FAN3 (4-pin) */
321                 reg = <0x02>;
322                 aspeed,fan-tach-ch = /bits/ 8 <0x02>;
323         };
324 
325         fan@3 {
326                 /* FAN4 (6-pin) */
327                 reg = <0x03>;
328                 aspeed,fan-tach-ch = /bits/ 8 <0x04 0x0b>;
329         };
330 
331         fan@4 {
332                 /* FAN6 (6-pin) */
333                 reg = <0x04>;
334                 aspeed,fan-tach-ch = /bits/ 8 <0x06 0x0d>;
335         };
336 
337         fan@5 {
338                 /* FAN5 (6-pin) */
339                 reg = <0x05>;
340                 aspeed,fan-tach-ch = /bits/ 8 <0x05 0x0c>;
341         };
342 };
343 
344 &adc {
345         status = "okay";
346         pinctrl-names = "default";
347         pinctrl-0 = <&pinctrl_adc0_default       /* 3VSB */
348                         &pinctrl_adc1_default    /* 5VSB */
349                         &pinctrl_adc2_default    /* VCPU */
350                         &pinctrl_adc3_default    /* VSOC */
351                         &pinctrl_adc4_default    /* VCCM */
352                         &pinctrl_adc5_default    /* APU-VDDP */
353                         &pinctrl_adc6_default    /* PM-VDD-CLDO */
354                         &pinctrl_adc7_default    /* PM-VDDCR-S5 */
355                         &pinctrl_adc8_default    /* PM-VDDCR */
356                         &pinctrl_adc9_default    /* VBAT */
357                         &pinctrl_adc10_default   /* 3V */
358                         &pinctrl_adc11_default   /* 5V */
359                         &pinctrl_adc12_default>; /* 12V */
360 };

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