1 // SPDX-License-Identifier: GPL-2.0-or-later
2 // Copyright 2019 IBM Corp.
3
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
6 #include <dt-bindings/clock/ast2600-clock.h>
7
8 / {
9 model = "Aspeed BMC";
10 compatible = "aspeed,ast2600";
11 #address-cells = <1>;
12 #size-cells = <1>;
13 interrupt-parent = <&gic>;
14
15 aliases {
16 i2c0 = &i2c0;
17 i2c1 = &i2c1;
18 i2c2 = &i2c2;
19 i2c3 = &i2c3;
20 i2c4 = &i2c4;
21 i2c5 = &i2c5;
22 i2c6 = &i2c6;
23 i2c7 = &i2c7;
24 i2c8 = &i2c8;
25 i2c9 = &i2c9;
26 i2c10 = &i2c10;
27 i2c11 = &i2c11;
28 i2c12 = &i2c12;
29 i2c13 = &i2c13;
30 i2c14 = &i2c14;
31 i2c15 = &i2c15;
32 serial0 = &uart1;
33 serial1 = &uart2;
34 serial2 = &uart3;
35 serial3 = &uart4;
36 serial4 = &uart5;
37 serial5 = &vuart1;
38 serial6 = &vuart2;
39 mdio0 = &mdio0;
40 mdio1 = &mdio1;
41 mdio2 = &mdio2;
42 mdio3 = &mdio3;
43 };
44
45
46 cpus {
47 #address-cells = <1>;
48 #size-cells = <0>;
49 enable-method = "aspeed,ast2600-smp";
50
51 cpu@f00 {
52 compatible = "arm,cortex-a7";
53 device_type = "cpu";
54 reg = <0xf00>;
55 };
56
57 cpu@f01 {
58 compatible = "arm,cortex-a7";
59 device_type = "cpu";
60 reg = <0xf01>;
61 };
62 };
63
64 timer {
65 compatible = "arm,armv7-timer";
66 interrupt-parent = <&gic>;
67 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
68 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
69 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
70 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
71 clocks = <&syscon ASPEED_CLK_HPLL>;
72 arm,cpu-registers-not-fw-configured;
73 always-on;
74 };
75
76 edac: sdram@1e6e0000 {
77 compatible = "aspeed,ast2600-sdram-edac", "syscon";
78 reg = <0x1e6e0000 0x174>;
79 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
80 };
81
82 ahb {
83 compatible = "simple-bus";
84 #address-cells = <1>;
85 #size-cells = <1>;
86 device_type = "soc";
87 ranges;
88
89 gic: interrupt-controller@40461000 {
90 compatible = "arm,cortex-a7-gic";
91 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
92 #interrupt-cells = <3>;
93 interrupt-controller;
94 interrupt-parent = <&gic>;
95 reg = <0x40461000 0x1000>,
96 <0x40462000 0x1000>,
97 <0x40464000 0x2000>,
98 <0x40466000 0x2000>;
99 };
100
101 ahbc: bus@1e600000 {
102 compatible = "aspeed,ast2600-ahbc", "syscon";
103 reg = <0x1e600000 0x100>;
104 };
105
106 fmc: spi@1e620000 {
107 reg = <0x1e620000 0xc4>, <0x20000000 0x10000000>;
108 #address-cells = <1>;
109 #size-cells = <0>;
110 compatible = "aspeed,ast2600-fmc";
111 clocks = <&syscon ASPEED_CLK_AHB>;
112 status = "disabled";
113 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
114 flash@0 {
115 reg = < 0 >;
116 compatible = "jedec,spi-nor";
117 spi-max-frequency = <50000000>;
118 spi-rx-bus-width = <2>;
119 status = "disabled";
120 };
121 flash@1 {
122 reg = < 1 >;
123 compatible = "jedec,spi-nor";
124 spi-max-frequency = <50000000>;
125 spi-rx-bus-width = <2>;
126 status = "disabled";
127 };
128 flash@2 {
129 reg = < 2 >;
130 compatible = "jedec,spi-nor";
131 spi-max-frequency = <50000000>;
132 spi-rx-bus-width = <2>;
133 status = "disabled";
134 };
135 };
136
137 spi1: spi@1e630000 {
138 reg = <0x1e630000 0xc4>, <0x30000000 0x10000000>;
139 #address-cells = <1>;
140 #size-cells = <0>;
141 compatible = "aspeed,ast2600-spi";
142 clocks = <&syscon ASPEED_CLK_AHB>;
143 status = "disabled";
144 flash@0 {
145 reg = < 0 >;
146 compatible = "jedec,spi-nor";
147 spi-max-frequency = <50000000>;
148 spi-rx-bus-width = <2>;
149 status = "disabled";
150 };
151 flash@1 {
152 reg = < 1 >;
153 compatible = "jedec,spi-nor";
154 spi-max-frequency = <50000000>;
155 spi-rx-bus-width = <2>;
156 status = "disabled";
157 };
158 };
159
160 spi2: spi@1e631000 {
161 reg = <0x1e631000 0xc4>, <0x50000000 0x10000000>;
162 #address-cells = <1>;
163 #size-cells = <0>;
164 compatible = "aspeed,ast2600-spi";
165 clocks = <&syscon ASPEED_CLK_AHB>;
166 status = "disabled";
167 flash@0 {
168 reg = < 0 >;
169 compatible = "jedec,spi-nor";
170 spi-max-frequency = <50000000>;
171 spi-rx-bus-width = <2>;
172 status = "disabled";
173 };
174 flash@1 {
175 reg = < 1 >;
176 compatible = "jedec,spi-nor";
177 spi-max-frequency = <50000000>;
178 spi-rx-bus-width = <2>;
179 status = "disabled";
180 };
181 flash@2 {
182 reg = < 2 >;
183 compatible = "jedec,spi-nor";
184 spi-max-frequency = <50000000>;
185 spi-rx-bus-width = <2>;
186 status = "disabled";
187 };
188 };
189
190 mdio0: mdio@1e650000 {
191 compatible = "aspeed,ast2600-mdio";
192 reg = <0x1e650000 0x8>;
193 #address-cells = <1>;
194 #size-cells = <0>;
195 status = "disabled";
196 pinctrl-names = "default";
197 pinctrl-0 = <&pinctrl_mdio1_default>;
198 resets = <&syscon ASPEED_RESET_MII>;
199 };
200
201 mdio1: mdio@1e650008 {
202 compatible = "aspeed,ast2600-mdio";
203 reg = <0x1e650008 0x8>;
204 #address-cells = <1>;
205 #size-cells = <0>;
206 status = "disabled";
207 pinctrl-names = "default";
208 pinctrl-0 = <&pinctrl_mdio2_default>;
209 resets = <&syscon ASPEED_RESET_MII>;
210 };
211
212 mdio2: mdio@1e650010 {
213 compatible = "aspeed,ast2600-mdio";
214 reg = <0x1e650010 0x8>;
215 #address-cells = <1>;
216 #size-cells = <0>;
217 status = "disabled";
218 pinctrl-names = "default";
219 pinctrl-0 = <&pinctrl_mdio3_default>;
220 resets = <&syscon ASPEED_RESET_MII>;
221 };
222
223 mdio3: mdio@1e650018 {
224 compatible = "aspeed,ast2600-mdio";
225 reg = <0x1e650018 0x8>;
226 #address-cells = <1>;
227 #size-cells = <0>;
228 status = "disabled";
229 pinctrl-names = "default";
230 pinctrl-0 = <&pinctrl_mdio4_default>;
231 resets = <&syscon ASPEED_RESET_MII>;
232 };
233
234 mac0: ethernet@1e660000 {
235 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100";
236 reg = <0x1e660000 0x180>;
237 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
238 clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>;
239 status = "disabled";
240 };
241
242 mac1: ethernet@1e680000 {
243 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100";
244 reg = <0x1e680000 0x180>;
245 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
246 clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>;
247 status = "disabled";
248 };
249
250 mac2: ethernet@1e670000 {
251 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100";
252 reg = <0x1e670000 0x180>;
253 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
254 clocks = <&syscon ASPEED_CLK_GATE_MAC3CLK>;
255 status = "disabled";
256 };
257
258 mac3: ethernet@1e690000 {
259 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100";
260 reg = <0x1e690000 0x180>;
261 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
262 clocks = <&syscon ASPEED_CLK_GATE_MAC4CLK>;
263 status = "disabled";
264 };
265
266 ehci0: usb@1e6a1000 {
267 compatible = "aspeed,ast2600-ehci", "generic-ehci";
268 reg = <0x1e6a1000 0x100>;
269 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
270 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
271 pinctrl-names = "default";
272 pinctrl-0 = <&pinctrl_usb2ah_default>;
273 status = "disabled";
274 };
275
276 ehci1: usb@1e6a3000 {
277 compatible = "aspeed,ast2600-ehci", "generic-ehci";
278 reg = <0x1e6a3000 0x100>;
279 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
280 clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>;
281 pinctrl-names = "default";
282 pinctrl-0 = <&pinctrl_usb2bh_default>;
283 status = "disabled";
284 };
285
286 uhci: usb@1e6b0000 {
287 compatible = "aspeed,ast2600-uhci", "generic-uhci";
288 reg = <0x1e6b0000 0x100>;
289 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
290 #ports = <2>;
291 clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>;
292 status = "disabled";
293 /*
294 * No default pinmux, it will follow EHCI, use an
295 * explicit pinmux override if EHCI is not enabled.
296 */
297 };
298
299 vhub: usb-vhub@1e6a0000 {
300 compatible = "aspeed,ast2600-usb-vhub";
301 reg = <0x1e6a0000 0x350>;
302 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
303 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
304 aspeed,vhub-downstream-ports = <7>;
305 aspeed,vhub-generic-endpoints = <21>;
306 pinctrl-names = "default";
307 pinctrl-0 = <&pinctrl_usb2ad_default>;
308 status = "disabled";
309 };
310
311 udc: usb@1e6a2000 {
312 compatible = "aspeed,ast2600-udc";
313 reg = <0x1e6a2000 0x300>;
314 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
315 clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>;
316 pinctrl-names = "default";
317 pinctrl-0 = <&pinctrl_usb2bd_default>;
318 status = "disabled";
319 };
320
321 apb {
322 compatible = "simple-bus";
323 #address-cells = <1>;
324 #size-cells = <1>;
325 ranges;
326
327 hace: crypto@1e6d0000 {
328 compatible = "aspeed,ast2600-hace";
329 reg = <0x1e6d0000 0x200>;
330 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
331 clocks = <&syscon ASPEED_CLK_GATE_YCLK>;
332 resets = <&syscon ASPEED_RESET_HACE>;
333 };
334
335 syscon: syscon@1e6e2000 {
336 compatible = "aspeed,ast2600-scu", "syscon", "simple-mfd";
337 reg = <0x1e6e2000 0x1000>;
338 ranges = <0 0x1e6e2000 0x1000>;
339 #address-cells = <1>;
340 #size-cells = <1>;
341 #clock-cells = <1>;
342 #reset-cells = <1>;
343
344 pinctrl: pinctrl {
345 compatible = "aspeed,ast2600-pinctrl";
346 };
347
348 silicon-id@14 {
349 compatible = "aspeed,ast2600-silicon-id", "aspeed,silicon-id";
350 reg = <0x14 0x4 0x5b0 0x8>;
351 };
352
353 smp-memram@180 {
354 compatible = "aspeed,ast2600-smpmem";
355 reg = <0x180 0x40>;
356 };
357
358 scu_ic0: interrupt-controller@560 {
359 #interrupt-cells = <1>;
360 compatible = "aspeed,ast2600-scu-ic0";
361 reg = <0x560 0x4>;
362 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
363 interrupt-controller;
364 };
365
366 scu_ic1: interrupt-controller@570 {
367 #interrupt-cells = <1>;
368 compatible = "aspeed,ast2600-scu-ic1";
369 reg = <0x570 0x4>;
370 interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
371 interrupt-controller;
372 };
373 };
374
375 rng: hwrng@1e6e2524 {
376 compatible = "timeriomem_rng";
377 reg = <0x1e6e2524 0x4>;
378 period = <1>;
379 quality = <100>;
380 };
381
382 gfx: display@1e6e6000 {
383 compatible = "aspeed,ast2600-gfx", "syscon";
384 reg = <0x1e6e6000 0x1000>;
385 reg-io-width = <4>;
386 clocks = <&syscon ASPEED_CLK_GATE_D1CLK>;
387 resets = <&syscon ASPEED_RESET_GRAPHICS>;
388 syscon = <&syscon>;
389 status = "disabled";
390 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
391 };
392
393 adc0: adc@1e6e9000 {
394 compatible = "aspeed,ast2600-adc0";
395 reg = <0x1e6e9000 0x100>;
396 clocks = <&syscon ASPEED_CLK_APB2>;
397 resets = <&syscon ASPEED_RESET_ADC>;
398 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
399 #io-channel-cells = <1>;
400 status = "disabled";
401 };
402
403 adc1: adc@1e6e9100 {
404 compatible = "aspeed,ast2600-adc1";
405 reg = <0x1e6e9100 0x100>;
406 clocks = <&syscon ASPEED_CLK_APB2>;
407 resets = <&syscon ASPEED_RESET_ADC>;
408 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
409 #io-channel-cells = <1>;
410 status = "disabled";
411 };
412
413 sbc: secure-boot-controller@1e6f2000 {
414 compatible = "aspeed,ast2600-sbc";
415 reg = <0x1e6f2000 0x1000>;
416 };
417
418 acry: crypto@1e6fa000 {
419 compatible = "aspeed,ast2600-acry";
420 reg = <0x1e6fa000 0x400>, <0x1e710000 0x1800>;
421 interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>;
422 clocks = <&syscon ASPEED_CLK_GATE_RSACLK>;
423 aspeed,ahbc = <&ahbc>;
424 };
425
426 video: video@1e700000 {
427 compatible = "aspeed,ast2600-video-engine";
428 reg = <0x1e700000 0x1000>;
429 clocks = <&syscon ASPEED_CLK_GATE_VCLK>,
430 <&syscon ASPEED_CLK_GATE_ECLK>;
431 clock-names = "vclk", "eclk";
432 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
433 status = "disabled";
434 };
435
436 gpio0: gpio@1e780000 {
437 #gpio-cells = <2>;
438 gpio-controller;
439 compatible = "aspeed,ast2600-gpio";
440 reg = <0x1e780000 0x400>;
441 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
442 gpio-ranges = <&pinctrl 0 0 208>;
443 ngpios = <208>;
444 clocks = <&syscon ASPEED_CLK_APB2>;
445 interrupt-controller;
446 #interrupt-cells = <2>;
447 };
448
449 sgpiom0: sgpiom@1e780500 {
450 #gpio-cells = <2>;
451 gpio-controller;
452 compatible = "aspeed,ast2600-sgpiom";
453 reg = <0x1e780500 0x100>;
454 interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
455 clocks = <&syscon ASPEED_CLK_APB2>;
456 #interrupt-cells = <2>;
457 interrupt-controller;
458 bus-frequency = <12000000>;
459 pinctrl-names = "default";
460 pinctrl-0 = <&pinctrl_sgpm1_default>;
461 status = "disabled";
462 };
463
464 sgpiom1: sgpiom@1e780600 {
465 #gpio-cells = <2>;
466 gpio-controller;
467 compatible = "aspeed,ast2600-sgpiom";
468 reg = <0x1e780600 0x100>;
469 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
470 clocks = <&syscon ASPEED_CLK_APB2>;
471 #interrupt-cells = <2>;
472 interrupt-controller;
473 bus-frequency = <12000000>;
474 pinctrl-names = "default";
475 pinctrl-0 = <&pinctrl_sgpm2_default>;
476 status = "disabled";
477 };
478
479 gpio1: gpio@1e780800 {
480 #gpio-cells = <2>;
481 gpio-controller;
482 compatible = "aspeed,ast2600-gpio";
483 reg = <0x1e780800 0x800>;
484 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
485 gpio-ranges = <&pinctrl 0 208 36>;
486 ngpios = <36>;
487 clocks = <&syscon ASPEED_CLK_APB1>;
488 interrupt-controller;
489 #interrupt-cells = <2>;
490 };
491
492 rtc: rtc@1e781000 {
493 compatible = "aspeed,ast2600-rtc";
494 reg = <0x1e781000 0x18>;
495 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
496 status = "disabled";
497 };
498
499 timer: timer@1e782000 {
500 compatible = "aspeed,ast2600-timer";
501 reg = <0x1e782000 0x90>;
502 interrupts-extended = <&gic GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
503 <&gic GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
504 <&gic GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
505 <&gic GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
506 <&gic GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
507 <&gic GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
508 <&gic GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
509 <&gic GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
510 clocks = <&syscon ASPEED_CLK_APB1>;
511 clock-names = "PCLK";
512 status = "disabled";
513 };
514
515 uart1: serial@1e783000 {
516 compatible = "ns16550a";
517 reg = <0x1e783000 0x20>;
518 reg-shift = <2>;
519 reg-io-width = <4>;
520 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
521 clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>;
522 resets = <&lpc_reset 4>;
523 no-loopback-test;
524 pinctrl-names = "default";
525 pinctrl-0 = <&pinctrl_txd1_default &pinctrl_rxd1_default>;
526 status = "disabled";
527 };
528
529 uart5: serial@1e784000 {
530 compatible = "ns16550a";
531 reg = <0x1e784000 0x1000>;
532 reg-shift = <2>;
533 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
534 clocks = <&syscon ASPEED_CLK_GATE_UART5CLK>;
535 no-loopback-test;
536 };
537
538 wdt1: watchdog@1e785000 {
539 compatible = "aspeed,ast2600-wdt";
540 reg = <0x1e785000 0x40>;
541 };
542
543 wdt2: watchdog@1e785040 {
544 compatible = "aspeed,ast2600-wdt";
545 reg = <0x1e785040 0x40>;
546 status = "disabled";
547 };
548
549 wdt3: watchdog@1e785080 {
550 compatible = "aspeed,ast2600-wdt";
551 reg = <0x1e785080 0x40>;
552 status = "disabled";
553 };
554
555 wdt4: watchdog@1e7850c0 {
556 compatible = "aspeed,ast2600-wdt";
557 reg = <0x1e7850C0 0x40>;
558 status = "disabled";
559 };
560
561 peci0: peci-controller@1e78b000 {
562 compatible = "aspeed,ast2600-peci";
563 reg = <0x1e78b000 0x100>;
564 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
565 clocks = <&syscon ASPEED_CLK_GATE_REF0CLK>;
566 resets = <&syscon ASPEED_RESET_PECI>;
567 cmd-timeout-ms = <1000>;
568 clock-frequency = <1000000>;
569 status = "disabled";
570 };
571
572 lpc: lpc@1e789000 {
573 compatible = "aspeed,ast2600-lpc-v2", "simple-mfd", "syscon";
574 reg = <0x1e789000 0x1000>;
575 reg-io-width = <4>;
576
577 #address-cells = <1>;
578 #size-cells = <1>;
579 ranges = <0x0 0x1e789000 0x1000>;
580
581 kcs1: kcs@24 {
582 compatible = "aspeed,ast2500-kcs-bmc-v2";
583 reg = <0x24 0x1>, <0x30 0x1>, <0x3c 0x1>;
584 interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
585 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
586 kcs_chan = <1>;
587 status = "disabled";
588 };
589
590 kcs2: kcs@28 {
591 compatible = "aspeed,ast2500-kcs-bmc-v2";
592 reg = <0x28 0x1>, <0x34 0x1>, <0x40 0x1>;
593 interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
594 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
595 status = "disabled";
596 };
597
598 kcs3: kcs@2c {
599 compatible = "aspeed,ast2500-kcs-bmc-v2";
600 reg = <0x2c 0x1>, <0x38 0x1>, <0x44 0x1>;
601 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
602 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
603 status = "disabled";
604 };
605
606 kcs4: kcs@114 {
607 compatible = "aspeed,ast2500-kcs-bmc-v2";
608 reg = <0x114 0x1>, <0x118 0x1>, <0x11c 0x1>;
609 interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
610 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
611 status = "disabled";
612 };
613
614 lpc_ctrl: lpc-ctrl@80 {
615 compatible = "aspeed,ast2600-lpc-ctrl";
616 reg = <0x80 0x80>;
617 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
618 status = "disabled";
619 };
620
621 lpc_snoop: lpc-snoop@80 {
622 compatible = "aspeed,ast2600-lpc-snoop";
623 reg = <0x80 0x80>;
624 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
625 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
626 status = "disabled";
627 };
628
629 lhc: lhc@a0 {
630 compatible = "aspeed,ast2600-lhc";
631 reg = <0xa0 0x24 0xc8 0x8>;
632 };
633
634 lpc_reset: reset-controller@98 {
635 compatible = "aspeed,ast2600-lpc-reset";
636 reg = <0x98 0x4>;
637 #reset-cells = <1>;
638 };
639
640 uart_routing: uart-routing@98 {
641 compatible = "aspeed,ast2600-uart-routing";
642 reg = <0x98 0x8>;
643 status = "disabled";
644 };
645
646 ibt: ibt@140 {
647 compatible = "aspeed,ast2600-ibt-bmc";
648 reg = <0x140 0x18>;
649 interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
650 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
651 status = "disabled";
652 };
653 };
654
655 sdc: sdc@1e740000 {
656 compatible = "aspeed,ast2600-sd-controller";
657 reg = <0x1e740000 0x100>;
658 #address-cells = <1>;
659 #size-cells = <1>;
660 ranges = <0 0x1e740000 0x10000>;
661 clocks = <&syscon ASPEED_CLK_GATE_SDCLK>;
662 status = "disabled";
663
664 sdhci0: sdhci@1e740100 {
665 compatible = "aspeed,ast2600-sdhci", "sdhci";
666 reg = <0x100 0x100>;
667 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
668 sdhci,auto-cmd12;
669 clocks = <&syscon ASPEED_CLK_SDIO>;
670 status = "disabled";
671 };
672
673 sdhci1: sdhci@1e740200 {
674 compatible = "aspeed,ast2600-sdhci", "sdhci";
675 reg = <0x200 0x100>;
676 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
677 sdhci,auto-cmd12;
678 clocks = <&syscon ASPEED_CLK_SDIO>;
679 status = "disabled";
680 };
681 };
682
683 emmc_controller: sdc@1e750000 {
684 compatible = "aspeed,ast2600-sd-controller";
685 reg = <0x1e750000 0x100>;
686 #address-cells = <1>;
687 #size-cells = <1>;
688 ranges = <0 0x1e750000 0x10000>;
689 clocks = <&syscon ASPEED_CLK_GATE_EMMCCLK>;
690 status = "disabled";
691
692 emmc: sdhci@1e750100 {
693 compatible = "aspeed,ast2600-sdhci";
694 reg = <0x100 0x100>;
695 sdhci,auto-cmd12;
696 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
697 clocks = <&syscon ASPEED_CLK_EMMC>;
698 pinctrl-names = "default";
699 pinctrl-0 = <&pinctrl_emmc_default>;
700 };
701 };
702
703 vuart1: serial@1e787000 {
704 compatible = "aspeed,ast2500-vuart";
705 reg = <0x1e787000 0x40>;
706 reg-shift = <2>;
707 interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
708 clocks = <&syscon ASPEED_CLK_APB1>;
709 no-loopback-test;
710 status = "disabled";
711 };
712
713 vuart3: serial@1e787800 {
714 compatible = "aspeed,ast2500-vuart";
715 reg = <0x1e787800 0x40>;
716 reg-shift = <2>;
717 interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
718 clocks = <&syscon ASPEED_CLK_APB2>;
719 no-loopback-test;
720 status = "disabled";
721 };
722
723 vuart2: serial@1e788000 {
724 compatible = "aspeed,ast2500-vuart";
725 reg = <0x1e788000 0x40>;
726 reg-shift = <2>;
727 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
728 clocks = <&syscon ASPEED_CLK_APB1>;
729 no-loopback-test;
730 status = "disabled";
731 };
732
733 vuart4: serial@1e788800 {
734 compatible = "aspeed,ast2500-vuart";
735 reg = <0x1e788800 0x40>;
736 reg-shift = <2>;
737 interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>;
738 clocks = <&syscon ASPEED_CLK_APB2>;
739 no-loopback-test;
740 status = "disabled";
741 };
742
743 uart2: serial@1e78d000 {
744 compatible = "ns16550a";
745 reg = <0x1e78d000 0x20>;
746 reg-shift = <2>;
747 reg-io-width = <4>;
748 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
749 clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>;
750 resets = <&lpc_reset 5>;
751 no-loopback-test;
752 pinctrl-names = "default";
753 pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>;
754 status = "disabled";
755 };
756
757 uart3: serial@1e78e000 {
758 compatible = "ns16550a";
759 reg = <0x1e78e000 0x20>;
760 reg-shift = <2>;
761 reg-io-width = <4>;
762 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
763 clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>;
764 resets = <&lpc_reset 6>;
765 no-loopback-test;
766 pinctrl-names = "default";
767 pinctrl-0 = <&pinctrl_txd3_default &pinctrl_rxd3_default>;
768 status = "disabled";
769 };
770
771 uart4: serial@1e78f000 {
772 compatible = "ns16550a";
773 reg = <0x1e78f000 0x20>;
774 reg-shift = <2>;
775 reg-io-width = <4>;
776 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
777 clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>;
778 resets = <&lpc_reset 7>;
779 no-loopback-test;
780 pinctrl-names = "default";
781 pinctrl-0 = <&pinctrl_txd4_default &pinctrl_rxd4_default>;
782 status = "disabled";
783 };
784
785 uart6: serial@1e790000 {
786 compatible = "ns16550a";
787 reg = <0x1e790000 0x20>;
788 reg-shift = <2>;
789 reg-io-width = <4>;
790 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
791 clocks = <&syscon ASPEED_CLK_GATE_UART6CLK>;
792 no-loopback-test;
793 pinctrl-names = "default";
794 pinctrl-0 = <&pinctrl_uart6_default>;
795
796 status = "disabled";
797 };
798
799 uart7: serial@1e790100 {
800 compatible = "ns16550a";
801 reg = <0x1e790100 0x20>;
802 reg-shift = <2>;
803 reg-io-width = <4>;
804 interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
805 clocks = <&syscon ASPEED_CLK_GATE_UART7CLK>;
806 no-loopback-test;
807 pinctrl-names = "default";
808 pinctrl-0 = <&pinctrl_uart7_default>;
809
810 status = "disabled";
811 };
812
813 uart8: serial@1e790200 {
814 compatible = "ns16550a";
815 reg = <0x1e790200 0x20>;
816 reg-shift = <2>;
817 reg-io-width = <4>;
818 interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
819 clocks = <&syscon ASPEED_CLK_GATE_UART8CLK>;
820 no-loopback-test;
821 pinctrl-names = "default";
822 pinctrl-0 = <&pinctrl_uart8_default>;
823
824 status = "disabled";
825 };
826
827 uart9: serial@1e790300 {
828 compatible = "ns16550a";
829 reg = <0x1e790300 0x20>;
830 reg-shift = <2>;
831 reg-io-width = <4>;
832 interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
833 clocks = <&syscon ASPEED_CLK_GATE_UART9CLK>;
834 no-loopback-test;
835 pinctrl-names = "default";
836 pinctrl-0 = <&pinctrl_uart9_default>;
837
838 status = "disabled";
839 };
840
841 i2c: bus@1e78a000 {
842 compatible = "simple-bus";
843 #address-cells = <1>;
844 #size-cells = <1>;
845 ranges = <0 0x1e78a000 0x1000>;
846 };
847
848 fsim0: fsi@1e79b000 {
849 #interrupt-cells = <1>;
850 compatible = "aspeed,ast2600-fsi-master", "fsi-master";
851 reg = <0x1e79b000 0x94>;
852 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
853 pinctrl-names = "default";
854 pinctrl-0 = <&pinctrl_fsi1_default>;
855 clocks = <&syscon ASPEED_CLK_GATE_FSICLK>;
856 interrupt-controller;
857 status = "disabled";
858 };
859
860 fsim1: fsi@1e79b100 {
861 #interrupt-cells = <1>;
862 compatible = "aspeed,ast2600-fsi-master", "fsi-master";
863 reg = <0x1e79b100 0x94>;
864 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
865 pinctrl-names = "default";
866 pinctrl-0 = <&pinctrl_fsi2_default>;
867 clocks = <&syscon ASPEED_CLK_GATE_FSICLK>;
868 interrupt-controller;
869 status = "disabled";
870 };
871
872 udma: dma-controller@1e79e000 {
873 compatible = "aspeed,ast2600-udma";
874 reg = <0x1e79e000 0x1000>;
875 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
876 dma-channels = <28>;
877 #dma-cells = <1>;
878 status = "disabled";
879 };
880 };
881 };
882 };
883
884 #include "aspeed-g6-pinctrl.dtsi"
885
886 &i2c {
887 i2c0: i2c@80 {
888 #address-cells = <1>;
889 #size-cells = <0>;
890 reg = <0x80 0x80>;
891 compatible = "aspeed,ast2600-i2c-bus";
892 clocks = <&syscon ASPEED_CLK_APB2>;
893 resets = <&syscon ASPEED_RESET_I2C>;
894 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
895 bus-frequency = <100000>;
896 pinctrl-names = "default";
897 pinctrl-0 = <&pinctrl_i2c1_default>;
898 status = "disabled";
899 };
900
901 i2c1: i2c@100 {
902 #address-cells = <1>;
903 #size-cells = <0>;
904 reg = <0x100 0x80>;
905 compatible = "aspeed,ast2600-i2c-bus";
906 clocks = <&syscon ASPEED_CLK_APB2>;
907 resets = <&syscon ASPEED_RESET_I2C>;
908 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
909 bus-frequency = <100000>;
910 pinctrl-names = "default";
911 pinctrl-0 = <&pinctrl_i2c2_default>;
912 status = "disabled";
913 };
914
915 i2c2: i2c@180 {
916 #address-cells = <1>;
917 #size-cells = <0>;
918 reg = <0x180 0x80>;
919 compatible = "aspeed,ast2600-i2c-bus";
920 clocks = <&syscon ASPEED_CLK_APB2>;
921 resets = <&syscon ASPEED_RESET_I2C>;
922 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
923 bus-frequency = <100000>;
924 pinctrl-names = "default";
925 pinctrl-0 = <&pinctrl_i2c3_default>;
926 status = "disabled";
927 };
928
929 i2c3: i2c@200 {
930 #address-cells = <1>;
931 #size-cells = <0>;
932 reg = <0x200 0x80>;
933 compatible = "aspeed,ast2600-i2c-bus";
934 clocks = <&syscon ASPEED_CLK_APB2>;
935 resets = <&syscon ASPEED_RESET_I2C>;
936 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
937 bus-frequency = <100000>;
938 pinctrl-names = "default";
939 pinctrl-0 = <&pinctrl_i2c4_default>;
940 status = "disabled";
941 };
942
943 i2c4: i2c@280 {
944 #address-cells = <1>;
945 #size-cells = <0>;
946 reg = <0x280 0x80>;
947 compatible = "aspeed,ast2600-i2c-bus";
948 clocks = <&syscon ASPEED_CLK_APB2>;
949 resets = <&syscon ASPEED_RESET_I2C>;
950 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
951 bus-frequency = <100000>;
952 pinctrl-names = "default";
953 pinctrl-0 = <&pinctrl_i2c5_default>;
954 status = "disabled";
955 };
956
957 i2c5: i2c@300 {
958 #address-cells = <1>;
959 #size-cells = <0>;
960 reg = <0x300 0x80>;
961 compatible = "aspeed,ast2600-i2c-bus";
962 clocks = <&syscon ASPEED_CLK_APB2>;
963 resets = <&syscon ASPEED_RESET_I2C>;
964 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
965 bus-frequency = <100000>;
966 pinctrl-names = "default";
967 pinctrl-0 = <&pinctrl_i2c6_default>;
968 status = "disabled";
969 };
970
971 i2c6: i2c@380 {
972 #address-cells = <1>;
973 #size-cells = <0>;
974 reg = <0x380 0x80>;
975 compatible = "aspeed,ast2600-i2c-bus";
976 clocks = <&syscon ASPEED_CLK_APB2>;
977 resets = <&syscon ASPEED_RESET_I2C>;
978 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
979 bus-frequency = <100000>;
980 pinctrl-names = "default";
981 pinctrl-0 = <&pinctrl_i2c7_default>;
982 status = "disabled";
983 };
984
985 i2c7: i2c@400 {
986 #address-cells = <1>;
987 #size-cells = <0>;
988 reg = <0x400 0x80>;
989 compatible = "aspeed,ast2600-i2c-bus";
990 clocks = <&syscon ASPEED_CLK_APB2>;
991 resets = <&syscon ASPEED_RESET_I2C>;
992 interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
993 bus-frequency = <100000>;
994 pinctrl-names = "default";
995 pinctrl-0 = <&pinctrl_i2c8_default>;
996 status = "disabled";
997 };
998
999 i2c8: i2c@480 {
1000 #address-cells = <1>;
1001 #size-cells = <0>;
1002 reg = <0x480 0x80>;
1003 compatible = "aspeed,ast2600-i2c-bus";
1004 clocks = <&syscon ASPEED_CLK_APB2>;
1005 resets = <&syscon ASPEED_RESET_I2C>;
1006 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1007 bus-frequency = <100000>;
1008 pinctrl-names = "default";
1009 pinctrl-0 = <&pinctrl_i2c9_default>;
1010 status = "disabled";
1011 };
1012
1013 i2c9: i2c@500 {
1014 #address-cells = <1>;
1015 #size-cells = <0>;
1016 reg = <0x500 0x80>;
1017 compatible = "aspeed,ast2600-i2c-bus";
1018 clocks = <&syscon ASPEED_CLK_APB2>;
1019 resets = <&syscon ASPEED_RESET_I2C>;
1020 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
1021 bus-frequency = <100000>;
1022 pinctrl-names = "default";
1023 pinctrl-0 = <&pinctrl_i2c10_default>;
1024 status = "disabled";
1025 };
1026
1027 i2c10: i2c@580 {
1028 #address-cells = <1>;
1029 #size-cells = <0>;
1030 reg = <0x580 0x80>;
1031 compatible = "aspeed,ast2600-i2c-bus";
1032 clocks = <&syscon ASPEED_CLK_APB2>;
1033 resets = <&syscon ASPEED_RESET_I2C>;
1034 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
1035 bus-frequency = <100000>;
1036 pinctrl-names = "default";
1037 pinctrl-0 = <&pinctrl_i2c11_default>;
1038 status = "disabled";
1039 };
1040
1041 i2c11: i2c@600 {
1042 #address-cells = <1>;
1043 #size-cells = <0>;
1044 reg = <0x600 0x80>;
1045 compatible = "aspeed,ast2600-i2c-bus";
1046 clocks = <&syscon ASPEED_CLK_APB2>;
1047 resets = <&syscon ASPEED_RESET_I2C>;
1048 interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
1049 bus-frequency = <100000>;
1050 pinctrl-names = "default";
1051 pinctrl-0 = <&pinctrl_i2c12_default>;
1052 status = "disabled";
1053 };
1054
1055 i2c12: i2c@680 {
1056 #address-cells = <1>;
1057 #size-cells = <0>;
1058 reg = <0x680 0x80>;
1059 compatible = "aspeed,ast2600-i2c-bus";
1060 clocks = <&syscon ASPEED_CLK_APB2>;
1061 resets = <&syscon ASPEED_RESET_I2C>;
1062 interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
1063 bus-frequency = <100000>;
1064 pinctrl-names = "default";
1065 pinctrl-0 = <&pinctrl_i2c13_default>;
1066 status = "disabled";
1067 };
1068
1069 i2c13: i2c@700 {
1070 #address-cells = <1>;
1071 #size-cells = <0>;
1072 reg = <0x700 0x80>;
1073 compatible = "aspeed,ast2600-i2c-bus";
1074 clocks = <&syscon ASPEED_CLK_APB2>;
1075 resets = <&syscon ASPEED_RESET_I2C>;
1076 interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
1077 bus-frequency = <100000>;
1078 pinctrl-names = "default";
1079 pinctrl-0 = <&pinctrl_i2c14_default>;
1080 status = "disabled";
1081 };
1082
1083 i2c14: i2c@780 {
1084 #address-cells = <1>;
1085 #size-cells = <0>;
1086 reg = <0x780 0x80>;
1087 compatible = "aspeed,ast2600-i2c-bus";
1088 clocks = <&syscon ASPEED_CLK_APB2>;
1089 resets = <&syscon ASPEED_RESET_I2C>;
1090 interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
1091 bus-frequency = <100000>;
1092 pinctrl-names = "default";
1093 pinctrl-0 = <&pinctrl_i2c15_default>;
1094 status = "disabled";
1095 };
1096
1097 i2c15: i2c@800 {
1098 #address-cells = <1>;
1099 #size-cells = <0>;
1100 reg = <0x800 0x80>;
1101 compatible = "aspeed,ast2600-i2c-bus";
1102 clocks = <&syscon ASPEED_CLK_APB2>;
1103 resets = <&syscon ASPEED_RESET_I2C>;
1104 interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
1105 bus-frequency = <100000>;
1106 pinctrl-names = "default";
1107 pinctrl-0 = <&pinctrl_i2c16_default>;
1108 status = "disabled";
1109 };
1110 };
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