1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 2 3 #include "armada-385-clearfog-gtr.dtsi" 4 5 / { 6 model = "SolidRun Clearfog GTR S4"; 7 compatible = "solidrun,clearfog-gtr-s4", "marvell,armada385", 8 "marvell,armada380"; 9 }; 10 11 &sfp0 { 12 tx-fault-gpio = <&gpio0 24 GPIO_ACTIVE_HIGH>; 13 }; 14 15 &mdio { 16 switch0: ethernet-switch@4 { 17 compatible = "marvell,mv88e6085"; 18 reg = <4>; 19 pinctrl-names = "default"; 20 pinctrl-0 = <&cf_gtr_switch_reset_pins>; 21 reset-gpios = <&gpio0 18 GPIO_ACTIVE_LOW>; 22 23 ethernet-ports { 24 #address-cells = <1>; 25 #size-cells = <0>; 26 27 ethernet-port@1 { 28 reg = <1>; 29 label = "lan2"; 30 phy-handle = <&switch0phy0>; 31 }; 32 33 ethernet-port@2 { 34 reg = <2>; 35 label = "lan1"; 36 phy-handle = <&switch0phy1>; 37 }; 38 39 ethernet-port@3 { 40 reg = <3>; 41 label = "lan4"; 42 phy-handle = <&switch0phy2>; 43 }; 44 45 ethernet-port@4 { 46 reg = <4>; 47 label = "lan3"; 48 phy-handle = <&switch0phy3>; 49 }; 50 51 ethernet-port@5 { 52 reg = <5>; 53 phy-mode = "2500base-x"; 54 ethernet = <ð1>; 55 56 fixed-link { 57 speed = <2500>; 58 full-duplex; 59 }; 60 }; 61 62 }; 63 64 mdio { 65 #address-cells = <1>; 66 #size-cells = <0>; 67 68 switch0phy0: ethernet-phy@11 { 69 reg = <0x11>; 70 }; 71 72 switch0phy1: ethernet-phy@12 { 73 reg = <0x12>; 74 }; 75 76 switch0phy2: ethernet-phy@13 { 77 reg = <0x13>; 78 }; 79 80 switch0phy3: ethernet-phy@14 { 81 reg = <0x14>; 82 }; 83 }; 84 85 }; 86 };
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