1 // SPDX-License-Identifier: GPL-2.0
2 / {
3 mbus@f1000000 {
4 pciec: pcie@82000000 {
5 compatible = "marvell,kirkwood-pcie";
6 status = "disabled";
7 device_type = "pci";
8
9 #address-cells = <3>;
10 #size-cells = <2>;
11
12 bus-range = <0x00 0xff>;
13
14 ranges =
15 <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000
16 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
17 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */>;
18
19 pcie0: pcie@1,0 {
20 device_type = "pci";
21 assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>;
22 reg = <0x0800 0 0 0 0>;
23 #address-cells = <3>;
24 #size-cells = <2>;
25 #interrupt-cells = <1>;
26 ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
27 0x81000000 0 0 0x81000000 0x1 0 1 0>;
28 bus-range = <0x00 0xff>;
29 interrupt-names = "intx", "error";
30 interrupts = <9>, <44>;
31 interrupt-map-mask = <0 0 0 7>;
32 interrupt-map = <0 0 0 1 &pcie_intc 0>,
33 <0 0 0 2 &pcie_intc 1>,
34 <0 0 0 3 &pcie_intc 2>,
35 <0 0 0 4 &pcie_intc 3>;
36 marvell,pcie-port = <0>;
37 marvell,pcie-lane = <0>;
38 clocks = <&gate_clk 2>;
39 status = "disabled";
40
41 pcie_intc: interrupt-controller {
42 interrupt-controller;
43 #interrupt-cells = <1>;
44 };
45 };
46 };
47 };
48
49 ocp@f1000000 {
50 pinctrl: pin-controller@10000 {
51 compatible = "marvell,98dx4122-pinctrl";
52
53 };
54 };
55 };
56
57 &sata_phy0 {
58 status = "disabled";
59 };
60
61 &sata_phy1 {
62 status = "disabled";
63 };
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